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CY2273APVC-4T PDF预览

CY2273APVC-4T

更新时间: 2024-11-18 21:10:47
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
14页 248K
描述
Processor Specific Clock Generator, 83.33MHz, CMOS, PDSO48, SSOP-48

CY2273APVC-4T 技术参数

生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP,针数:48
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.79
JESD-30 代码:R-PDSO-G48长度:15.875 mm
端子数量:48最高工作温度:70 °C
最低工作温度:最大输出时钟频率:83.33 MHz
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
主时钟/晶体标称频率:14.318 MHz认证状态:Not Qualified
座面最大高度:2.794 mm最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
宽度:7.5 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches:1

CY2273APVC-4T 数据手册

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CY2273A  
Pentium®/II, 6x86,K6ClockSynthesizer/DriverforDesktopPCs  
with Intel 82430TX, 82440LX or ALI IV/IV+, AGP and 3 DIMMs  
The CY2273A possesses power-down, CPU stop, and PCI  
Features  
stop pins for power management control. These inputs are  
multiplexed with SDRAM clock outputs, and are selected when  
the MODE pin is driven low. Additionally, the signals are syn-  
chronized on-chip, and ensure glitch-free transitions on the  
outputs. When the CPU_STOP input is asserted, the CPU  
clock outputs are driven LOW. When the PCI_STOP input is  
asserted, the PCI clock outputs (except the free-running PCI  
clock) are driven LOW. When the PWR_DWN pin is asserted,  
the reference oscillator and PLLs are shut down, and all out-  
puts are driven LOW.  
• Mixed 2.5V and 3.3V operation  
• Complete clock solution for Pentium®, Pentium® II,  
Cyrix, and AMD processor-based motherboards  
— Four CPU clocks at 2.5V or 3.3V  
— Up to twelve 3.3V SDRAM clocks  
— Seven synchronous PCI clocks, one free-running  
— One 3.3V 48 MHz USB clock  
— One 2.5V IOAPIC clock (-3 option only)  
— Two AGP clocks at 60 or 66.6MHz (-2 option only)  
— One 3.3V Ref. clock at 14.318 MHz  
The CY2273A outputs are designed for low EMI emissions.  
Controlled rise and fall times, unique output driver circuits and  
factory-EPROM programmable output drive and slew-rate en-  
able optimal configurations for EMI control.  
2
• I C™ Serial Configuration Interface  
• Factory-EPROM programmable output drive and slew  
rate for EMI customization  
• Factory-EPROM programmable CPU clock frequencies  
for custom configurations  
• Power-down, CPU stop and PCI stop pins  
• Available in space-saving 48-pin SSOP package  
CY2273A Selector Guide  
Clocks Outputs  
-1  
-2  
-3  
-4  
CPU (60, 66.6, 75,  
83.3 MHz)  
4
4
--  
4
Functional Description  
The CY2273A is a clock synthesizer/driver for a Pentium, Pen-  
tium II, Cyrix, or AMD processor-based PC using Intel’s  
82430TX, 82440LX, ALI Aladdin IV or Aladdin IV+ chipsets.  
CPU (60, 66.6 MHz)  
SDRAM  
--  
--  
4
--  
9/12  
9/12  
9/12  
9/12  
[1]  
[1]  
[1]  
[1]  
PCI (30, 33.3MHz)  
USB/IR (48MHz)  
AGP (60 or 66MHz)  
IOAPIC (14.318MHz)  
Ref (14.318MHz)  
CPU-PCI delay  
7
5
7
7
The CY2273A-1 outputs four CPU clocks at 2.5V or 3.3V with  
up to 83.3MHz operation. There are seven PCI clocks, running  
at 30 and 33.3MHz. One of the PCI clocks is free-running.  
Additionally, the part outputs up to twelve 3.3V SDRAM clocks,  
one 3.3V USB clock at 48 MHz, and one 3.3V reference clock  
at 14.318 MHz. The CY2273A-2 is similar, except that  
PCICLK4 and PCICLK5 are now AGP clocks. The CY2273A-3  
is more suited to Pentium II systems, as it outputs one 2.5V  
IOAPIC clock. Finally, the CY2273A-4 is similar to the  
CY2273A-1 except that is supports 0-ns CPU-PCI delay.  
1
--  
--  
1
1
2
--  
1
1
--  
1
1
1
--  
--  
1
1–5.5 ns 1–5.5 ns 0 ns  
0 ns  
Note:  
1. One free-running PCI clock.  
CY2273A-3 only  
Logic Block Diagram  
IOAPIC  
VDDQ2  
REF0 (14.318 MHz)  
XTALIN  
14.318  
MHz  
OSC.  
STOP  
LOGIC  
CPU  
PLL  
XTALOUT  
CPUCLK [0-3]  
VDDCPU  
SEL0  
SEL1  
CY2273A-1,-2,-4 only  
SDRAM5/PWR_DWN  
SDRAM [0-4],[8-11]  
EPROM  
SDRAM6/CPU_STOP  
MODE  
Delay (-1,-2 option)  
SDRAM7/PCI_STOP  
SYS PLL  
/1 or /1.25  
/1 or /2  
CY2273A-2 only  
AGP [0,1]  
STOP  
LOGIC  
PCI [0-5], PCI [0-3]  
PCICLK_F  
SERIAL  
INTERFACE  
CONTROL  
LOGIC  
SCLK  
USBCLK (48 MHz)  
SDATA  
Intel and Pentium are registered trademarks of Intel Corporation. I2C is a trademark of Philips Corporation.  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
October 12, 1998  

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