CY14C064PA
CY14B064PA
CY14E064PA
64ꢀKbit (8 K × 8) SPI nvSRAM
with Real Time Clock
64-Kbit (8
K × 8) SPI nvSRAM with Real Time Clock
Write protection
Features
Hardware protection using Write Protect (WP) pin
Software protection using Write Disable instruction
Software block protection for 1/4, 1/2, or entire array
64ꢀKbit nonvolatile static random access memory (nvSRAM)
Internally organized as 8 K × 8
STORE to QuantumTrap nonvolatile elements initiated
automatically on powerꢀdown (AutoStore) or by using SPI
instruction (Software STORE) or HSB pin (Hardware
STORE)
RECALLtoSRAMinitiatedonpowerꢀup(PowerUpRECALL)
or by SPI instruction (Software RECALL)
Automatic STORE on powerꢀdown with a small capacitor
High reliability
Low power consumption
Average active current of 3 mA at 40 MHz operation
Average standby mode current of 250 ꢀA
Sleep mode current of 8 ꢀA
Industry standard configurations
Operating voltages:
• CY14C064PA : VCC = 2.4 V to 2.6 V
• CY14B064PA : VCC = 2.7 V to 3.6 V
• CY14E064PA : VCC = 4.5 V to 5.5 V
Industrial temperature
Infinite read, write, and RECALL cycles
1 million STORE cycles to QuantumTrap
Data retention: 20 years at 85 °C
16ꢀpin small outline integrated circuit (SOIC) package
Restriction of hazardous substances (RoHS) compliant
Real time clock (RTC)
Fullꢀfeatured RTC
Watchdog timer
Clock alarm with programmable interrupts
Backup power fail indication
Overview
The Cypress CY14X064PA combines a 64 Kbit nvSRAM[1] with
a fullꢀfeatured RTC in a monolithic integrated circuit with serial
SPI interface. The memory is organized as 8 K words of 8 bits
each. The embedded nonvolatile elements incorporate the
QuantumTrap technology, creating the world’s most reliable
nonvolatile memory. The SRAM provides infinite read and write
cycles, while the QuantumTrap cells provide highly reliable
nonvolatile storage of data. Data transfers from SRAM to the
nonvolatile elements (STORE operation) takes place
automatically at powerꢀdown. On powerꢀup, data is restored to
the SRAM from the nonvolatile memory (RECALL operation).
You can also initiate the STORE and RECALL operations
through SPI instruction.
Square wave output with programmable frequency (1 Hz,
512 Hz, 4096 Hz, 32.768 kHz)
Capacitor or battery backup for RTC
Backup current of 0.45 ꢀA (typical)
40 MHz, and 104 MHz Highꢀspeed serial peripheral interface
(SPI)
40 MHz clock rate SPI write and read with zero cycle delay
104 MHz clock rate SPI write and read (with special fast read
instructions)
Supports SPI mode 0 (0,0) and mode 3 (1,1)
SPI access to special functions
Nonvolatile STORE/RECALL
8ꢀbyte serial number
Manufacturer ID and Product ID
Sleep mode
Logic Block Diagram
VRTCcap VRTCbat
VCC VCAP
Serial Number
8 x 8
Power Control
Block
Manufacture ID/
Product ID
QuantrumTrap
8 K x 8
SLEEP
STORE
SRAM
8 K x 8
RDSN/WRSN/RDID
SI
CS
Memory
Data &
RECALL
READ/WRITE
SPI Control Logic
Write Protection
Instruction decoder
Address
Control
STORE/RECALL/ASENB/ASDISB
SCK
WP
SO
WRSR/RDSR/WREN
RDRTC/WRTC
Status Register
Xin
INT/SQW
Xout
RTC Control Logic
Registers
Counters
Note
1. This device will be referred to as nvSRAM throughout the document.
Cypress Semiconductor Corporation
Document #: 001ꢀ68249 Rev. *A
•
198 Champion Court
•
San Jose
,
CA 95134ꢀ1709
•
408ꢀ943ꢀ2600
Revised May 6, 2011
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