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CY14B256L-SP45XI PDF预览

CY14B256L-SP45XI

更新时间: 2024-11-23 04:13:19
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器
页数 文件大小 规格书
17页 1212K
描述
256-Kbit (32K x 8) nvSRAM

CY14B256L-SP45XI 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SSOP包装说明:0.300 INCH, ROHS COMPLIANT, SSOP-48
针数:48Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.41
Factory Lead Time:1 week风险等级:5.53
最长访问时间:45 nsJESD-30 代码:R-PDSO-G48
JESD-609代码:e4长度:15.875 mm
内存密度:262144 bit内存集成电路类型:NON-VOLATILE SRAM
内存宽度:8湿度敏感等级:3
功能数量:1端子数量:48
字数:32768 words字数代码:32000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:32KX8
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP48,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:3/3.3 V
认证状态:Not Qualified座面最大高度:2.794 mm
最大待机电流:0.003 A子类别:SRAMs
最大压摆率:0.055 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:20
宽度:7.5057 mm

CY14B256L-SP45XI 数据手册

 浏览型号CY14B256L-SP45XI的Datasheet PDF文件第2页浏览型号CY14B256L-SP45XI的Datasheet PDF文件第3页浏览型号CY14B256L-SP45XI的Datasheet PDF文件第4页浏览型号CY14B256L-SP45XI的Datasheet PDF文件第5页浏览型号CY14B256L-SP45XI的Datasheet PDF文件第6页浏览型号CY14B256L-SP45XI的Datasheet PDF文件第7页 
PRELIMINARY  
CY14B256L  
256-Kbit (32K x 8) nvSRAM  
Features  
Functional Description  
• 25 ns, 35 ns, and 45 ns access times  
The Cypress CY14B256L is a fast static RAM with a nonvol-  
atile element in each memory cell. The embedded nonvolatile  
elements incorporate QuantumTrap technology producing the  
world’s most reliable nonvolatile memory. The SRAM provides  
infinite read and write cycles while independent, nonvolatile  
data resides in the highly reliable QuantumTrap cell. Data  
transfers from the SRAM to the nonvolatile elements (the  
STORE operation) takes place automatically at power down.  
On power up, data is restored to the SRAM (the RECALL  
operation) from the nonvolatile memory. The STORE and  
RECALL operations are also available under software control.  
• “Hands-off” automatic STORE on power down with only a  
small capacitor  
STORE to QuantumTrapnonvolatile elements is initiated  
by software, device pin, or AutoStore™ on power down  
RECALL to SRAM initiated by software or power up  
• Infinite READ, WRITE, and RECALL cycles  
• 10 mA typical ICC at 200 ns cycle time  
• 200,000 STORE cycles to QuantumTrap  
20-year data retention @ 55°C  
• Single 3V operation with tolerance of +15%, –10%  
• Commercial and industrial temperature  
• SOIC and SSOP packages  
• RoHS compliance  
Logic Block Diagram  
V
CC  
V
CAP  
QuantumTrap  
512 X 512  
POWER  
CONTROL  
A5  
STORE  
A6  
A7  
A8  
RECALL  
STORE/  
RECALL  
CONTROL  
STATIC RAM  
ARRAY  
512 X 512  
HSB  
A9  
A11  
A12  
A13  
A14  
SOFTWARE  
DETECT  
A13  
-
A0  
DQ0  
COLUMN IO  
DQ1  
DQ2  
DQ3  
COLUMN DEC  
DQ4  
DQ5  
DQ6  
DQ7  
A0  
A4  
A10  
A1  
A3  
A2  
OE  
CE  
WE  
Cypress Semiconductor Corporation  
Document #: 001-06422 Rev. *E  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised January 27, 2007  
[+] Feedback  

CY14B256L-SP45XI 替代型号

型号 品牌 替代类型 描述 数据表
CY14B256LA-SP45XIT CYPRESS

完全替代

256 Kbit (32K x 8) nvSRAM
CY14B256LA-SP25XIT CYPRESS

完全替代

256 Kbit (32K x 8) nvSRAM
CY14B256LA-SP25XI CYPRESS

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256 Kbit (32K x 8) nvSRAM

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