Datasheet > 存储 > SRAM> CY14B256L-SP45XIT

CY14B256L-SP45XIT

更新时间： 2024-11-23 04:13:19

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		静态存储器
页数	文件大小	规格书
17页	1212K
描述
256-Kbit (32K x 8) nvSRAM

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中文翻译

获取价格

数据手册

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CY14B256L-SP45XIT 数据手册

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PRELIMINARY

CY14B256L

256-Kbit (32K x 8) nvSRAM

Features

Functional Description

• 25 ns, 35 ns, and 45 ns access times

The Cypress CY14B256L is a fast static RAM with a nonvol-

atile element in each memory cell. The embedded nonvolatile

elements incorporate QuantumTrap technology producing the

world’s most reliable nonvolatile memory. The SRAM provides

infinite read and write cycles while independent, nonvolatile

data resides in the highly reliable QuantumTrap cell. Data

transfers from the SRAM to the nonvolatile elements (the

STORE operation) takes place automatically at power down.

On power up, data is restored to the SRAM (the RECALL

operation) from the nonvolatile memory. The STORE and

RECALL operations are also available under software control.

• “Hands-off” automatic STORE on power down with only a

small capacitor

• STORE to QuantumTrap™ nonvolatile elements is initiated

by software, device pin, or AutoStore™ on power down

• RECALL to SRAM initiated by software or power up

• Infinite READ, WRITE, and RECALL cycles

• 10 mA typical I_CCat 200 ns cycle time

• 200,000 STORE cycles to QuantumTrap

• 20-year data retention @ 55°C

• Single 3V operation with tolerance of +15%, –10%

• Commercial and industrial temperature

• SOIC and SSOP packages

• RoHS compliance

Logic Block Diagram

CAP

QuantumTrap

512 X 512

POWER

CONTROL

A₅

STORE

A₆

A₇

A₈

RECALL

STORE/

RECALL

CONTROL

STATIC RAM

ARRAY

512 X 512

HSB

A₉

A₁₁

A₁₂

A₁₃

A₁₄

SOFTWARE

DETECT

A₁₃

A₀

DQ₀

COLUMN IO

DQ₁

DQ₂

DQ₃

COLUMN DEC

DQ₄

DQ₅

DQ₆

DQ₇

A₀

A₄

A₁₀

A₁

A₃

A₂

Cypress Semiconductor Corporation

Document #: 001-06422 Rev. *E

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised January 27, 2007

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