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CP309-CMPT3090L-WS PDF预览

CP309-CMPT3090L-WS

更新时间: 2024-11-18 19:15:43
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CENTRAL /
页数 文件大小 规格书
2页 214K
描述
Transistor

CP309-CMPT3090L-WS 技术参数

生命周期:Active包装说明:,
Reach Compliance Code:compliant风险等级:5.61
Base Number Matches:1

CP309-CMPT3090L-WS 数据手册

 浏览型号CP309-CMPT3090L-WS的Datasheet PDF文件第2页 
TM  
PROCESS CP309  
Power Transistor  
Central  
Semiconductor Corp.  
NPN - Low Saturation Transistor Chip  
PROCESS DETAILS  
Process  
EPITAXIAL PLANAR  
Die Size  
Die Thickness  
41.3 x 41.3 MILS  
9.0 MILS  
Base Bonding Pad Area  
Emitter Bonding Pad Area  
Top Side Metalization  
Back Side Metalization  
9.5 x 9.2 MILS  
12.8 x 10.2 MILS  
Al - 30,000Å  
Au - 18,000Å  
GEOMETRY  
GROSS DIE PER 4 INCH WAFER  
6,670  
PRINCIPAL DEVICE TYPES  
CMPT3090L  
CXT3090L  
CZT3090L  
CMXT3090L  
145 Adams Avenue  
Hauppauge, NY 11788 USA  
Tel: (631) 435-1110  
Fax: (631) 435-1824  
www.centralsemi.com  
R2 (15- September 2003)