Datasheet > CMN1002PGLA

CMN1002PGLA

更新时间： 2025-07-30 18:23:43

品牌	Logo	应用领域
APPLIED POWER		/
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5页	1346K
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TOLL-A

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CMN1002PGLA 数据手册

CMN1002PGLA

N-Channel 100V (D-S) Power MOSFET

Description

Applications

The CMN1002PGLA is the N-Channel enhancement mode

power field effect transistors with high cell density, trench

technology. This high density process and design have

been optimized switching performance and especially tai-

lored to minimize on-state resistance.



AC/DC load switch

SMPS

Notebooks and Handhelds adapter

UPS Power

Marking Information

Features

Marking Code = N1002PGLA

Date Code = XXXX



V_DS: 100V

I_D(@V_GS=10V): 233A

N1002PGLA

RDS_ON(@V_GS=10V) : < 2.4mΩ

High density cell design for extremely low RDS_ON

Excellent on-resistance and DC current capability

XXXX

Ordering Information

Equivalent Circuit and Pin Configuration

TOLL

P/N

Packaging

Remark

PIN 9

CMN1002PGLA

2000/Tape & Reel

ROHS

PIN 1

PIN 2-8

Absolute Maximum Ratings (Tc=25 ℃ unless otherwise noted)

Parameter

Symbol

Maximum

Unit

Drain-source Voltage

Gate-source Voltage

VDS

VGS

100

±20

233

120

171

933

250

Tc=25°C(Silicon Limit)

Continuous Drain Current ⁽¹⁾Tc=25°C(Package Limit)

Tc=100°C (Silicon Limit)

Pulsed Drain Current⁽²⁾

IDM

PD @ Tc=25°C

Total Power Dissipation ⁽³⁾

Derating Factor

above 25°C

1.7

W/°C

Thermal Resistance Junction-to-Case ⁽³⁾

RθJC

0.6

°C/W

°C

Junction and Storage Temperature Range

TJ,TSTG

-55 to +175

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