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CMLDM7002AJ PDF预览

CMLDM7002AJ

更新时间: 2024-11-23 03:26:03
品牌 Logo 应用领域
CENTRAL 晶体小信号场效应晶体管光电二极管放大器
页数 文件大小 规格书
2页 106K
描述
SURFACE MOUNT PICOmini DUAL N-CHANNEL ENHANCEMENT-MODE SILICON MOSFET

CMLDM7002AJ 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Active零件包装代码:SOT
包装说明:SMALL OUTLINE, R-PDSO-F6针数:6
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8541.21.00.95风险等级:5.03
Is Samacsys:N配置:SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE
最小漏源击穿电压:60 V最大漏极电流 (Abs) (ID):0.28 A
最大漏极电流 (ID):0.28 A最大漏源导通电阻:2 Ω
FET 技术:METAL-OXIDE SEMICONDUCTOR最大反馈电容 (Crss):5 pF
JESD-30 代码:R-PDSO-F6JESD-609代码:e0
元件数量:2端子数量:6
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
极性/信道类型:N-CHANNEL最大功率耗散 (Abs):0.35 W
认证状态:Not Qualified子类别:FET General Purpose Power
表面贴装:YES端子面层:Tin/Lead (Sn/Pb)
端子形式:FLAT端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管应用:AMPLIFIER
晶体管元件材料:SILICONBase Number Matches:1

CMLDM7002AJ 数据手册

 浏览型号CMLDM7002AJ的Datasheet PDF文件第2页 
TM  
CMLDM7002A  
CMLDM7002AJ  
Central  
DESCRIPTION:  
Semiconductor Corp.  
TM  
SURFACE MOUNT PICOmini  
DUAL N-CHANNEL  
ENHANCEMENT-MODE  
SILICON MOSFET  
The CENTRAL SEMICONDUCTOR CMLDM7002A  
and CMLDM7002AJ are special dual versions of the  
2N7002 Enhancement-mode N-Channel Field Effect  
Transistor, manufactured by the N-Channel DMOS  
Process, designed for high speed pulsed amplifier and  
driver applications. The CMLDM7002A utilizes the USA  
pinout configuration, while the CMLDM7002AJ utilizes the  
Japanese pinout configuration. These special Dual  
Transistor devices offer low r  
and low V  
DS (ON).  
DS(ON)  
SOT-563 CASE  
MARKING CODE: CMLDM7002A: L02  
CMLDM7002AJ: 02J  
MAXIMUM RATINGS (T =25°C)  
A
SYMBOL  
UNITS  
Drain-Source Voltage  
Drain-Gate Voltage  
Gate-Source Voltage  
Continuous Drain Current  
V
60  
60  
V
V
DS  
DG  
GS  
V
V
40  
V
I
280  
280  
1.5  
1.5  
350  
300  
150  
mA  
mA  
A
D
Continuous Source Current (Body Diode)  
Maximum Pulsed Drain Current  
Maximum Pulsed Source Current  
Power Dissipation  
I
S
I
I
DM  
A
SM  
P
P
P
mW (Note 1)  
mW (Note 2)  
mW (Note 3)  
D
D
D
Power Dissipation  
Power Dissipation  
Operating and Storage  
Junction Temperature  
T ,T  
J stg  
-65 to +150  
357  
°C  
°C/W  
Thermal Resistance  
Θ
JA  
ELECTRICAL CHARACTERISTICS PER TRANSISTOR (T =25°C unless otherwise noted)  
A
SYMBOL  
TEST CONDITIONS  
MIN  
MAX  
100  
100  
1.0  
UNITS  
I
I
I
I
I
V
V
V
V
V
V
V
V
V
V
V
V
V
V
=20V, V =0V  
nA  
nA  
µA  
µA  
mA  
V
GSSF  
GSSR  
DSS  
GS  
GS  
DS  
DS  
GS  
GS  
DS  
=20V, V =0V  
DS  
=60V, V =0V  
GS  
=60V, V =0V, T =125°C  
500  
DSS  
GS  
DS  
j
=10V, V  
2V  
500  
60  
D(ON)  
DS(ON)  
BV  
=0V, I =10µA  
DSS  
D
V
V
V
=V , I =250µA  
1.0  
2.5  
1.0  
0.15  
2.0  
3.5  
3.0  
5.0  
V
GS(th)  
DS GS  
D
=10V, I =500mA  
V
DS(ON)  
DS(ON)  
DS(ON)  
DS(ON)  
DS(ON)  
DS(ON)  
GS  
GS  
GS  
GS  
GS  
GS  
DS  
D
=5.0V, I =50mA  
V
D
r
r
r
r
=10V, I =500mA  
D
=10V, I =500mA, T =125°C  
D
j
=5.0V, I =50mA  
D
=5.0V, I =50mA, T =125°C  
D
j
g
2V  
, I =200mA  
80  
mmhos  
FS  
DS(ON)  
D
Notes: (1) Ceramic or aluminum core PC Board with copper mounting pad area of 4.0 mm2  
(2) FR-4 Epoxy PC Board with copper mounting pad area of 4.0 mm2  
(3) FR-4 Epoxy PC Board with copper mounting pad area of 1.4 mm2  
R3 (19-December 2003)  

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