ꢀ
ꢀ 3312ꢀ-ꢀ2ꢀmmꢀSMDꢀTrimmingꢀPotentiometer
CDDFN10-0516Pꢀ-ꢀSurfaceꢀMountꢀTVSꢀDiodeꢀArray
Applications Information
The Model CDDFN10-0516P was designed to provide ESD and surge protection for USB 3.0 and USB 3.1 applications. USB 3.x
controller ICs typically have device level ESD ratings of about 2 kV per ANSI/ESDA/JEDEC JS-001-2010, to prevent ESD damage
in a manufacturing environment. For this ANSI/ESDA/JEDEC JS-001-2010 test, a 100 pF cap capacitor is discharged into the device
input through a 1500 ohm resistor. A system level ESD requirement is, however, typically specified to IEC 61000-4-2, which is more
stringent than JESD22-A114F requirements. The IEC 61000-4-2 test discharges a 150 pF capacitor through a 330 ohm resistor. The
CDDFN10-0516P is designed to enable a USB3.x controller IC to meet system ESD levels as high as 10 kV (contact test) per the IEC
61000-4-2 Standard. The device also provides up to 4 A (8/20 µS) of surge protection on the 5 V V
line per IEC 61000-4-5.
BUS
The Bourns® Model CDDFN10-0516P provides protection for six signal lines and a 5 V power bus. Its ultra-low capacitance minimizes
signal distortion on USB 3.1 super-speed data lines with 10 Gbps data rates. The figure below shows the connection diagram for one
port of a USB 3.x application. USB 3.1 provides three voltage/current options for bus power: 5 V @ up to 2 A, 12 V @ up to 5 A and
20 V @ up to 5 A. The V
line should only be connected to Pin 2 of the CDDFN10-0516P device if the bus voltage is limited to the
BUS
5 V option. In cases where the bus voltage is 12 V or 20 V, a separate device is required to protect the V
line.
BUS
POWER
CIRCUIT(S)
V
BUS
USB
CONNECTOR
V
DD
GND
CDDFN10-0516P
1
2
D+
D-
D+
D-
10
9
V
V
BUS
BUS
USB 3.x
CONTROLLER
3
V
BUS
NC
8
NC
4
5
SSTX+
SSTX-
SSRX+
SSRX-
SSTX+
SSTX-
SSRX+
SSRX-
7
6
Flow-through
package design
(Top View)
The flow-through package design of the Model CDDFN10-0516P simplifies signal routing on the printed circuit board. This minimizes
the effect of the device connection on the signal line impedance and on system performance. The 10 Gbps eye diagrams below show
that the loading of Pins 4 through 7 has a minimal impact on the performance of the USB 3.1 super-speed data lines.
Performance Without Protection
Performance With Protection
-15 ps
0 +15 ps
-15 ps
0 +15 ps
Specificationsꢀareꢀsubjectꢀtoꢀchangeꢀwithoutꢀnotice.
Theꢀdeviceꢀcharacteristicsꢀandꢀparametersꢀinꢀthisꢀdataꢀsheetꢀcanꢀandꢀdoꢀvaryꢀinꢀdifferentꢀapplicationsꢀandꢀactualꢀdeviceꢀperformanceꢀmayꢀvaryꢀoverꢀtime.
Usersꢀshouldꢀverifyꢀactualꢀdeviceꢀperformanceꢀinꢀtheirꢀspecificꢀapplications.