CDCM1804

更新时间： 2024-11-16 22:29:23

品牌	Logo	应用领域
德州仪器 - TI		输出元件时钟
页数	文件大小	规格书
24页	580K
描述
1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

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CDCM1804 数据手册

CDCM1804

www.ti.com

SCAS697E–JULY 2003–REVISED MAY 2005

1:3 LVPECL CLOCK BUFFER + ADDITIONAL

LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

The CDCM1804 is characterized for operation from

–40°C to 85°C.

FEATURES

•

Distributes One Differential Clock Input to

Three LVPECL Differential Clock Outputs and

One LVCMOS Single-Ended Output

For use in single-ended driver applications, the

CDCM1804 also provides a VBB output terminal that

can be directly connected to the unused input as a

common-mode voltage reference.

•

Programmable Output Divider for Two

LVPECL Outputs and LVCMOS Output

Low-Output Skew 15 ps (Typical) for

Clock-Distribution Applications for LVPECL

Outputs; 1.6-ns Output Skew Between

LVCMOS and LVPECL Transitions Minimizing

Noise

RGE PACKAGE

(TOP VIEW)

•

V_CCRange 3 V–3.6 V

24 23 22 21 20 19

PECL

Signaling Rate Up to 800-MHz LVPECL and

200-MHz LVCMOS

•

Differential Input Stage for Wide

Common-Mode Range

(1)

Provides VBB Bias Voltage Output for

Single-Ended Input Signals

PECL

VBB

•

Receiver Input Threshold ±75 mV

10 11 12

24-Terminal QFN Package (4 mm × 4 mm)

Accepts Any Differential Signaling:

LVDS, HSTL, CML, VML, SSTL-2, and

Single-Ended: LVTTL/LVCMOS

(1)

Thermal pad must be connected to V

P0024-01

DESCRIPTION

RTH PACKAGE

(TOP VIEW)

The CDCM1804 clock driver distributes one pair of

differential clock inputs to three pairs of LVPECL

differential clock outputs Y[2:0] and Y[2:0], with mini-

mum skew for clock distribution. The CDCM1804 is

specifically designed for driving 50-Ω transmission

lines. Additionally, the CDCM1804 offers

PECL

single-ended LVCMOS output Y3. This output is

delayed by 1.6 ns over the three LVPECL output

stages to minimize noise impact during signal tran-

sitions.

(1)

The CDCM1804 has three control terminals, S0, S1,

and S2, to select different output mode settings. The

S[2:0] terminals are 3-level inputs and therefore allow

up to 3³= 27 combinations. Additionally, an enable

terminal (EN) is provided to disable or enable all

outputs simultaneously. The EN terminal is a 3-level

input as well and extends the number of settings to

2 × 27 = 54. See Table 1 for details.

PECL

VBB

(1)

Thermal pad must be connected to V

P0025-01

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...24

中文翻译

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CDCM1804 替代型号

型号	品牌	替代类型	描述	数据表
LMK01000	TI	功能相似	具有 3 个 LVDS 和 5 个 LVPECL 输出的 1.6GHz 高性能时钟缓冲器、
CDCP1803	TI	功能相似	1:3 LVPECL CLOCK BUFFER WITH PROGRAMMABLE DIVIDER
CDCM1802	TI	功能相似	CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT

与CDCM1804相关器件

型号	品牌	获取价格	描述	数据表
CDCM1804_17	TI	获取价格	1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER
CDCM1804RGER	TI	获取价格	1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER
CDCM1804RGERG4	TI	获取价格	1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER
CDCM1804RGET	TI	获取价格	1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER
CDCM1804RGETG4	TI	获取价格	1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER
CDCM1804RTHR	TI	获取价格	1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER
CDCM1804RTHT	TI	获取价格	1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER
CDCM61001	TI	获取价格	One Output, Integrated VCO, Low-Jitter Clock Generator
CDCM61001_10	TI	获取价格	One Output, Integrated VCO, Low-Jitter Clock Generator
CDCM61001_12	TI	获取价格	One Output, Integrated VCO, Low-Jitter Clock Generator

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