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CD74HC139 PDF预览

CD74HC139

更新时间: 2024-09-12 23:04:27
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德州仪器 - TI 解复用器
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6页 39K
描述
High-Speed CMOS Logic Dual 2-to-4 Line Decoder/Demultiplexer

CD74HC139 数据手册

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CD74HC139,  
CD74HCT139  
Data sheet acquired from Harris Semiconductor  
SCHS148A  
High-Speed CMOS Logic  
September 1997 - Revised May 1999  
Dual 2-to-4 Line Decoder/Demultiplexer  
Features  
Description  
• Multifunction Capability  
The CD74HC139 and CD74HCT139 devices contain two  
independent binary to one of four decoders each with a  
single active low enable input (1E or 2E). Data on the select  
inputs (1A0 and 1A1 or 2A0 and 2A1) cause one of the four  
normally high outputs to go low.  
- Binary to 1 of 4 Decoders or 1 to 4 Line  
Demultiplexer  
[ /Title  
(CD74  
HC139  
,
CD74  
HCT13  
9)  
• Active Low Mutually Exclusive Outputs  
• Fanout (Over Temperature Range)  
If the enable input is high all four outputs remain high. For  
demultiplexer operation the enable input is the data input.  
The enable input also functions as a chip select when these  
devices are cascaded. This device is functionally the same  
as the CD4556B and is pin compatible with it.  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
/Sub-  
ject  
The outputs of these devices can drive 10 low power  
Schottky TTL equivalent loads. The 74HCT logic family is  
functionally as well as pin equivalent to the 74LS logic family.  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
(High  
Speed  
CMOS  
Logic  
Dual  
2-to-4  
Line  
Decod  
• HC Types  
Ordering Information  
- 2V to 6V Operation  
PKG.  
- High Noise Immunity: N = 30%, N = 30%of V  
IL IH CC  
at  
o
PART NUMBER TEMP. RANGE ( C) PACKAGE  
NO.  
E16.3  
E16.3  
V
= 5V  
CC  
CD74HC139E  
CD74HCT139E  
CD74HC139M  
CD74HCT139M  
NOTES:  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
16 Ld PDIP  
16 Ld PDIP  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
16 Ld SOIC M16.15  
16 Ld SOIC M16.15  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
• Memory Decoding, Data Routing, Code Conversion  
1. When ordering, use the entire part number. Add the suffix 96 to  
obtain the variant in the tape and reel.  
2. Die is available which meets all electrical specifications. Please  
contact your local sales office or customer service for ordering  
information.  
Pinout  
CD74HC139, CD74HCT139  
(PDIP, SOIC)  
TOP VIEW  
1E  
1A0  
1A1  
1Y0  
1Y1  
1Y2  
1Y3  
GND  
1
2
3
4
5
6
7
8
16 V  
CC  
15 2E  
14 2A0  
13 2A1  
12 2Y0  
11 2Y1  
10 2Y2  
9
2Y3  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © Texas Instruments Incorporated 1999  
1

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