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CD74HC139M

更新时间： 2024-09-12 23:04:27
品牌 Logo 应用领域
哈里斯 - HARRIS 解复用器
页数 文件大小 规格书
5页 30K
描述
High Speed CMOS Logic Dual 2-to-4 Line Decoder/Demultiplexer

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CD74HC139M 技术参数

是否Rohs认证： 不符合生命周期：Transferred
包装说明：SOP, SOP16,.25Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.63Is Samacsys：N
系列：HC/UHJESD-30 代码：R-PDSO-G16
JESD-609代码：e0负载电容（CL）：50 pF
逻辑集成电路类型：OTHER DECODER/DRIVER最大I（ol）：0.004 A
功能数量：2端子数量：16
最高工作温度：125 °C最低工作温度：-55 °C
输出极性：INVERTED封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
电源：2/6 VProp。Delay @ Nom-Sup：44 ns
传播延迟（tpd）：180 ns认证状态：Not Qualified
子类别：Decoder/Drivers最大供电电压 (Vsup)：6 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUALBase Number Matches：1

CD74HC139M 数据手册

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CD74HC139,  
CD74HCT139  
S E M I C O N D U C T O R  
High Speed CMOS Logic  
September 1997  
Dual 2-to-4 Line Decoder/Demultiplexer  
Features  
Description  
• Multifunction Capability  
The Harris CD74HC139, CD74HCT139 contain two  
independent binary to one of four decoders each with a  
single active low enable input (1E or 2E). Data on the select  
inputs (1A0 and 1A1 or 2A0 and 2A1) cause one of the four  
normally high outputs to go low.  
- Binary to 1 of 4 Decoders or 1 to 4 Line  
Demultiplexer  
• Active Low Mutually Exclusive Outputs  
• Fanout (Over Temperature Range)  
If the enable input is high all four outputs remain high. For  
demultiplexer operation the enable input is the data input.  
The enable input also functions as a chip select when these  
devices are cascaded. This device is functionally the same  
as the CD4556B and is pin compatible with it.  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
The outputs of these devices can drive 10 low power  
Schottky TTL equivalent loads. The 74HCT logic family is  
functionally as well as pin equivalent to the 74LS logic family.  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
• HC Types  
Ordering Information  
- 2V to 6V Operation  
PKG.  
- High Noise Immunity: N = 30%, N = 30%of V  
IL IH CC  
at  
o
PART NUMBER TEMP. RANGE ( C) PACKAGE  
NO.  
E16.3  
E16.3  
V
= 5V  
CC  
CD74HC139E  
CD74HCT139E  
CD74HC139M  
NOTES:  
-55 to 125  
-55 to 125  
-55 to 125  
16 Ld PDIP  
16 Ld PDIP  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
16 Ld SOIC M16.15  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I ≤ 1µA at V , V  
OL OH  
l
1. When ordering, use the entire part number. Add the suffix 96 to  
obtain the variant in the tape and reel.  
• Memory Decoding, Data Routing, Code Conversion  
2. Die is available which meets all electrical specifications. Please  
contact your local sales office or Harris customer service for  
ordering information.  
Pinout  
CD74HC139, CD74HCT139  
(PDIP, SOIC)  
TOP VIEW  
1E  
1A0  
1A1  
1Y0  
1Y1  
1Y2  
1Y3  
GND  
1
2
3
4
5
6
7
8
16 V  
CC  
15 2E  
14 2A0  
13 2A1  
12 2Y0  
11 2Y1  
10 2Y2  
9
2Y3  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
File Number 1545.1  
Copyright © Harris Corporation 1997  
1
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