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CD4514BMS_06 PDF预览

CD4514BMS_06

更新时间: 2024-11-03 04:36:11
品牌 Logo 应用领域
英特矽尔 - INTERSIL 解码器锁存器
页数 文件大小 规格书
9页 341K
描述
CMOS 4-Bit Latch/4-to-16 Line Decoders

CD4514BMS_06 数据手册

 浏览型号CD4514BMS_06的Datasheet PDF文件第2页浏览型号CD4514BMS_06的Datasheet PDF文件第3页浏览型号CD4514BMS_06的Datasheet PDF文件第4页浏览型号CD4514BMS_06的Datasheet PDF文件第5页浏览型号CD4514BMS_06的Datasheet PDF文件第6页浏览型号CD4514BMS_06的Datasheet PDF文件第7页 
CD4514BMS  
CD4515BMS  
CMOS 4-Bit  
Latch/4-to-16 Line Decoders  
July 14, 2006  
Features  
Pinout  
CD4514BMS, CD4515BMS  
• High-Voltage Types (20-Volt Rating)  
• CD4514BMS Output “High” on Select  
• CD4515BMS Output “Low” on Select  
• Strobed Input Latch  
TOP VIEW  
1
2
3
4
5
6
7
8
9
24  
VDD  
STROBE  
DATA 1  
DATA 2  
S7  
23 INHIBIT  
22 DATA 4  
21 DATA 3  
20 S10  
• Inhibit Control  
• 100% Tested for Quiescent Current at 20V  
S6  
19 S11  
S5  
• Maximum Input Current of 1µA at 18V Over Full Pack-  
age Temperature Range; 100nA at 18V and 25oC  
18 S8  
S4  
17 S9  
S3  
S1  
• Noise Margin (Full Package-Temperature Range):  
- 1V at VDD = 5V  
16 S14  
S2 10  
S0 11  
15 S15  
- 2V at VDD = 10V  
14 S12  
- 2.5V at VDD = 15V  
VSS 12  
13 S13  
• 5V, 10V, and 15V Parametric Ratings  
• Standardized, Symmetrical Output Characteristics  
• Meets all Requirements of JEDEC Tentative Standard  
No. 13B, "Standard Specifications for Description of  
‘B’ Series CMOS Devices"  
Functional Diagram  
VDD = 24  
VSS = 12  
Applications  
11 S0  
S1  
10 S2  
• Digital Multiplexing  
• Address Decoding  
9
8
7
6
5
4
S3  
S4  
S5  
S6  
S7  
• Hexadecimal/BCD Decoding  
• Program-counter Decoding  
• Control Decoder  
DATA 1  
DATA 2  
2
3
A
B
C
4 TO 16  
DECODER  
LATCH  
DATA 3 21  
DATA 4 22  
18 S8  
17 S9  
D
20 S10  
19 S11  
14 S12  
13 S13  
16 S14  
15 S15  
Description  
STROBE  
1
CD4514BMS and CD4515BMS consist of a 4-bit strobed  
latch and a 4-to-16-line decoder. The latches hold the last  
input data presented prior to the strobe transition from 1 to 0.  
Inhibit control allows all outputs to be placed at  
0(CD4514BMS) or 1(CD4515BMS) regardless of the state of  
the data or strobe inputs.  
INHIBIT 23  
The decode truth table indicates all combinations of data  
inputs and appropriate selected outputs.  
These devices are similar to industry types MC14514 and  
MC14515.  
The CD4514BMS and CD4515BMS are supplied in these 24  
lead outline packages:  
Braze Seal DIP  
Frit Seal DIP  
H4V  
H1Z  
H4P  
Ceramic Flatpack  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 | Copyright © Intersil Corporation 1999, 2006  
FN3195.1  
1

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