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CD4515BCWMX PDF预览

CD4515BCWMX

更新时间: 2024-11-02 23:40:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 解码器驱动器解复用器逻辑集成电路光电二极管双倍数据速率
页数 文件大小 规格书
8页 87K
描述
4-To-16-Line Demultiplexer

CD4515BCWMX 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:SOIC包装说明:0.300 INCH, MS-013, SOIC-24
针数:24Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.2Is Samacsys:N
其他特性:ADDRESS LATCHES系列:4000/14000/40000
输入调节:LATCHEDJESD-30 代码:R-PDSO-G24
长度:15.4 mm负载电容(CL):50 pF
逻辑集成电路类型:OTHER DECODER/DRIVER功能数量:1
端子数量:24最高工作温度:125 °C
最低工作温度:-55 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP24,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5/15 V
Prop。Delay @ Nom-Sup:1100 ns传播延迟(tpd):1100 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:Decoder/Drivers最大供电电压 (Vsup):15 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5 mm
Base Number Matches:1

CD4515BCWMX 数据手册

 浏览型号CD4515BCWMX的Datasheet PDF文件第2页浏览型号CD4515BCWMX的Datasheet PDF文件第3页浏览型号CD4515BCWMX的Datasheet PDF文件第4页浏览型号CD4515BCWMX的Datasheet PDF文件第5页浏览型号CD4515BCWMX的Datasheet PDF文件第6页浏览型号CD4515BCWMX的Datasheet PDF文件第7页 
October 1987  
Revised August 2000  
CD4514BCCD4515BC  
4-Bit Latched/4-to-16 Line Decoders  
General Description  
Features  
The CD4514BC and CD4515BC are 4-to-16 line decoders  
with latched inputs implemented with complementary MOS  
(CMOS) circuits constructed with N- and P-channel  
enhancement mode transistors. These circuits are prima-  
rily used in decoding applications where low power dissipa-  
tion and/or high noise immunity is required.  
Wide supply voltage range: 3.0V to 15V  
High noise immunity: 0.45 VDD (typ.)  
Low power TTL: fan out of 2  
compatibility: driving 74L  
Low quiescent power dissipation:  
0.025 µW/package @ 5.0 VDC  
The CD4514BC (output active high option) presents a logi-  
cal “1” at the selected output, whereas the CD4515BC pre-  
sents a logical “0” at the selected output. The input latches  
are R–S type flip-flops, which hold the last input data pre-  
sented prior to the strobe transition from “1” to “0”. This  
input data is decoded and the corresponding output is acti-  
vated. An output inhibit line is also available.  
Single supply operation  
Input impedance = 1012typically  
Plug-in replacement for MC14514, MC14515  
Ordering Code:  
Order Number Package Number  
Package Diagram  
CD4514BCWM  
CD4514BCN  
CD4515BCWM  
CD4515BCN  
M24B  
N24A  
M24B  
N24A  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600 Wide  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600 Wide  
Devices also available in Tape and Reel. Specify by appending suffix letter Xto the ordering code.  
Connection Diagram  
Top View  
© 2000 Fairchild Semiconductor Corporation  
DS005994  
www.fairchildsemi.com  

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