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CD4515BCN PDF预览

CD4515BCN

更新时间: 2024-11-03 00:00:55
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 解码器
页数 文件大小 规格书
9页 92K
描述
4-Bit Latched/4-to-16 Line Decoders

CD4515BCN 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP24,.6
针数:24Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.29系列:4000/14000/40000
输入调节:LATCHEDJESD-30 代码:R-PDIP-T24
长度:31.915 mm负载电容(CL):50 pF
逻辑集成电路类型:OTHER DECODER/DRIVER功能数量:1
端子数量:24最高工作温度:125 °C
最低工作温度:-55 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP24,.6封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5/15 VProp。Delay @ Nom-Sup:1100 ns
传播延迟(tpd):1100 ns认证状态:Not Qualified
座面最大高度:5.334 mm子类别:Decoder/Drivers
最大供电电压 (Vsup):15 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:15.24 mmBase Number Matches:1

CD4515BCN 数据手册

 浏览型号CD4515BCN的Datasheet PDF文件第2页浏览型号CD4515BCN的Datasheet PDF文件第3页浏览型号CD4515BCN的Datasheet PDF文件第4页浏览型号CD4515BCN的Datasheet PDF文件第5页浏览型号CD4515BCN的Datasheet PDF文件第6页浏览型号CD4515BCN的Datasheet PDF文件第7页 
October 1987  
Revised August 2000  
CD4514BCCD4515BC  
4-Bit Latched/4-to-16 Line Decoders  
General Description  
Features  
The CD4514BC and CD4515BC are 4-to-16 line decoders  
with latched inputs implemented with complementary MOS  
(CMOS) circuits constructed with N- and P-channel  
enhancement mode transistors. These circuits are prima-  
rily used in decoding applications where low power dissipa-  
tion and/or high noise immunity is required.  
Wide supply voltage range: 3.0V to 15V  
High noise immunity: 0.45 VDD (typ.)  
Low power TTL: fan out of 2  
compatibility: driving 74L  
Low quiescent power dissipation:  
0.025 µW/package @ 5.0 VDC  
The CD4514BC (output active high option) presents a logi-  
cal “1” at the selected output, whereas the CD4515BC pre-  
sents a logical “0” at the selected output. The input latches  
are R–S type flip-flops, which hold the last input data pre-  
sented prior to the strobe transition from “1” to “0”. This  
input data is decoded and the corresponding output is acti-  
vated. An output inhibit line is also available.  
Single supply operation  
Input impedance = 1012typically  
Plug-in replacement for MC14514, MC14515  
Ordering Code:  
Order Number Package Number  
Package Diagram  
CD4514BCWM  
CD4514BCN  
CD4515BCWM  
CD4515BCN  
M24B  
N24A  
M24B  
N24A  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600 Wide  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600 Wide  
Devices also available in Tape and Reel. Specify by appending suffix letter Xto the ordering code.  
Connection Diagram  
Top View  
© 2000 Fairchild Semiconductor Corporation  
DS005994  
www.fairchildsemi.com  

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