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CD4515BC PDF预览

CD4515BC

更新时间: 2024-11-03 00:00:55
品牌 Logo 应用领域
美国国家半导体 - NSC 解码器
页数 文件大小 规格书
7页 122K
描述
4-Bit Latched/4-to-16 Line Decoders

CD4515BC 数据手册

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February 1988  
CD4514BM/CD4514BC, CD4515BM/CD4515BC  
4-Bit Latched/4-to-16 Line Decoders  
General Description  
Features  
Y
Wide supply voltage range  
3.0V to 15V  
0.45 V (typ.)  
The CD4514B and CD4515B are 4-to-16 line decoders with  
latched inputs implemented with complementary MOS  
(CMOS) circuits constructed with N- and P-channel en-  
hancement mode transistors. These circuits are primarily  
used in decoding applications where low power dissipation  
and/or high noise immunity is required.  
Y
High noise immunity  
DD  
Y
Low power TTL  
compatibility  
fan out of 2  
driving 74L  
Y
Low quiescent power dissipation  
0.025 mW/package  
@
5.0 V  
DC  
Y
The CD4514B (output active high option) presents a logical  
‘‘1’’ at the selected output, whereas the CD4515B presents  
a logical ‘‘0’’ at the selected output. The input latches are  
R–S type flip-flops, which hold the last input data presented  
prior to the strobe transition from ‘‘1’’ to ‘‘0’’. This input data  
is decoded and the corresponding output is activated. An  
output inhibit line is also available.  
Single supply operation  
12  
10 X typically  
Y
Y
e
Plug-in replacement for MC14514, MC14515  
Input impedance  
Logic and Connection Diagrams  
TL/F/5994–1  
Dual-In-Line Package  
Order Number CD4514B or CD4515B  
TL/F/5994–2  
Top View  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/5994  
RRD-B30M105/Printed in U. S. A.  

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