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CD4066BC_05 PDF预览

CD4066BC_05

更新时间: 2024-11-25 03:52:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 开关
页数 文件大小 规格书
9页 115K
描述
Quad Bilateral Switch

CD4066BC_05 数据手册

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November 1983  
Revised October 2005  
CD4066BC  
Quad Bilateral Switch  
High degree linearity 0.1% distortion (typ.)  
High degree linearity @ fis = 1 kHz, Vis = 5Vp-p  
High degree linearity DDVSS = 10V, RL = 10 kΩ  
General Description  
,
The CD4066BC is a quad bilateral switch intended for the  
transmission or multiplexing of analog or digital signals. It is  
pin-for-pin compatible with CD4016BC, but has a much  
lower “ON” resistance, and “ON” resistance is relatively  
constant over the input-signal range.  
V
Extremely low “OFF” 0.1 nA (typ.)  
switch leakage: @ VDDVSS = 10V, TA = 25°C  
Extremely high control input impedance 1012(typ.)  
Low crosstalk 50 dB (typ.)  
Features  
Wide supply voltage range 3V to 15V  
between switches @ fis = 0.9 MHz, RL = 1 kΩ  
High noise immunity 0.45 VDD (typ.)  
Frequency response, switch “ON” 40 MHz (typ.)  
Wide range of digital and ±7.5 VPEAK  
Applications  
analog switching  
Analog signal switching/multiplexing  
“ON” resistance for 15V operation 80Ω  
Matched “ON” resistance RON = 5(typ.)  
• Signal gating  
• Squelch control  
over 15V signal input  
• Chopper  
“ON” resistance flat over peak-to-peak signal range  
High “ON”/“OFF” 65 dB (typ.)  
• Modulator/Demodulator  
• Commutating switch  
output voltage ratio @ fis = 10 kHz, RL = 10 kΩ  
Digital signal switching/multiplexing  
CMOS logic implementation  
Analog-to-digital/digital-to-analog conversion  
Control Line Biasing:  
Switch On (Logic 1), VC = VDD  
Switch Off (Logic 0), VC = VSS  
Digital control of frequency, impedance, phase, and  
analog-signal-gain  
Ordering Code:  
Order Number Package Number  
Package Description  
CD4066BCM  
CD4066BCSJ  
CD4066BCN  
M14A  
M14D  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Devices also available in Tape and Reel. Specify by appending suffix letter Xto the ordering code.  
Connection Diagram  
Schematic Diagram  
© 2005 Fairchild Semiconductor Corporation  
DS005665  
www.fairchildsemi.com  

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