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CAT28C64BN-20 PDF预览

CAT28C64BN-20

更新时间: 2024-10-26 12:49:07
品牌 Logo 应用领域
安森美 - ONSEMI 存储内存集成电路可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
13页 78K
描述
64K-Bit CMOS PARALLEL EEPROM

CAT28C64BN-20 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFJ
包装说明:QCCJ,针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.03
最长访问时间:200 ns其他特性:AUTOMATIC WRITE; PAGE WRITE
JESD-30 代码:R-PQCC-J32JESD-609代码:e0
长度:13.97 mm内存密度:65536 bit
内存集成电路类型:EEPROM内存宽度:8
湿度敏感等级:3功能数量:1
端子数量:32字数:8192 words
字数代码:8000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:8KX8封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装形状:RECTANGULAR
封装形式:CHIP CARRIER并行/串行:PARALLEL
峰值回流温度(摄氏度):240编程电压:5 V
认证状态:Not Qualified座面最大高度:3.55 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:TIN LEAD端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:11.43 mm
Base Number Matches:1

CAT28C64BN-20 数据手册

 浏览型号CAT28C64BN-20的Datasheet PDF文件第2页浏览型号CAT28C64BN-20的Datasheet PDF文件第3页浏览型号CAT28C64BN-20的Datasheet PDF文件第4页浏览型号CAT28C64BN-20的Datasheet PDF文件第5页浏览型号CAT28C64BN-20的Datasheet PDF文件第6页浏览型号CAT28C64BN-20的Datasheet PDF文件第7页 
CAT28C64B  
64K-Bit CMOS PARALLEL EEPROM  
FEATURES  
Fast read access times:  
Commercial, industrial and automotive  
– 90/120/150ns  
temperature ranges  
Low power CMOS dissipation:  
– Active: 25 mA max.  
Automatic page write operation:  
– 1 to 32 bytes in 5ms  
– Standby: 100 µA max.  
– Page load timer  
Simple write operation:  
End of write detection:  
– Toggle bit  
– On-chip address and data latches  
– Self-timed write cycle with auto-clear  
DATA polling  
Fast write cycle time:  
100,000 program/erase cycles  
100 year data retention  
– 5ms max.  
CMOS and TTL compatible I/O  
Hardware and software write protection  
DESCRIPTION  
The CAT28C64B is manufactured using Catalyst’s  
advancedCMOSfloatinggatetechnology.Itisdesigned  
to endure 100,000 program/erase cycles and has a data  
retentionof100years.ThedeviceisavailableinJEDEC-  
approved 28-pin DIP, TSOP, SOIC, or, 32-pin PLCC  
package .  
The CAT28C64B is a fast, low power, 5V-only CMOS  
Parallel EEPROM organized as 8K x 8-bits. It requires a  
simple interface for in-system programming. On-chip  
address and data latches, self-timed write cycle with  
auto-clear and VCC power up/down write protection  
eliminate additional timing and protection hardware.  
DATA Polling and Toggle status bits signal the start and  
end of the self-timed write cycle. Additionally, the  
CAT28C64B features hardware and software write  
protection.  
BLOCK DIAGRAM  
8,192 x 8  
EEPROM  
ARRAY  
ROW  
DECODER  
ADDR. BUFFER  
& LATCHES  
A A  
5
12  
INADVERTENT  
WRITE  
PROTECTION  
HIGH VOLTAGE  
GENERATOR  
32 BYTE PAGE  
REGISTER  
V
CC  
CE  
OE  
WE  
CONTROL  
LOGIC  
I/O BUFFERS  
DATA POLLING  
AND  
TIMER  
TOGGLE BIT  
I/O I/O  
0
7
ADDR. BUFFER  
& LATCHES  
A A  
COLUMN  
DECODER  
0
4
© 2009 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
Doc. No. MD-1011, Rev. I  
1

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