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BUK556-60A PDF预览

BUK556-60A

更新时间: 2024-11-22 22:17:27
品牌 Logo 应用领域
恩智浦 - NXP 晶体晶体管
页数 文件大小 规格书
7页 56K
描述
PowerMOS transistor Logic level FET

BUK556-60A 数据手册

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Philips Semiconductors  
Product Specification  
PowerMOS transistor  
Logic level FET  
BUK556-60A  
GENERAL DESCRIPTION  
QUICK REFERENCE DATA  
N-channel enhancement mode  
logic level field-effect power  
SYMBOL  
PARAMETER  
MAX.  
UNIT  
transistor in a plastic envelope.  
The device is intended for use in  
Switched Mode Power Supplies  
(SMPS), motor control, welding,  
DC/DC and AC/DC converters, and  
in automotive and general purpose  
switching applications.  
VDS  
ID  
Drain-source voltage  
Drain current (DC)  
Total power dissipation  
Drain-source on-state resistance  
60  
50  
150  
26  
V
A
Ptot  
W
RDS(ON)  
m  
VGS = 5 V  
PINNING - TO220AB  
PIN CONFIGURATION  
SYMBOL  
PIN  
1
DESCRIPTION  
d
tab  
gate  
2
drain  
g
3
source  
tab drain  
1 2 3  
s
LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134)  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
VDS  
VDGR  
±VGS  
±VGSM  
ID  
Drain-source voltage  
Drain-gate voltage  
-
-
60  
60  
V
V
RGS = 20 kΩ  
-
-
Gate-source voltage  
-
15  
V
Non-repetitive gate-source voltage  
Drain current (DC)  
Drain current (DC)  
tp 50 µs  
Tmb = 25 ˚C  
Tmb = 100 ˚C  
Tmb = 25 ˚C  
Tmb = 25 ˚C  
-
-
20  
V
-
50  
A
ID  
-
38  
A
IDM  
Drain current (pulse peak value)  
Total power dissipation  
Storage temperature  
-
200  
150  
175  
175  
A
Ptot  
Tstg  
Tj  
-
- 55  
-
W
˚C  
˚C  
Junction Temperature  
-
THERMAL RESISTANCES  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
Rth j-mb  
Rth j-a  
Thermal resistance junction to  
-
-
-
1.0  
-
K/W  
K/W  
mounting base  
Thermal resistance junction to  
ambient  
60  
April 1993  
1
Rev 1.100  

BUK556-60A 替代型号

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