Very Low Power/Voltage CMOS SRAM
256K X 16 bit
BSI
BS616LV4010
DESCRIPTION
FEATURES
The BS616LV4010 is a high performance, very low power CMOS Static
Random Access Memory organized as 262,144 words by 16 bits and
operates from a wide range of 2.7V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current
of 0.5uA and maximum access time of 70ns in 3V operation.
Easy memory expansion is provided by an active LOW chip
enable(CE) and active LOW output enable(OE) and three-state output
drivers.
The BS616LV4010 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS616LV4010 is available in DICE form, JEDEC standard 44-pin
TSOP Type II package and 48-pin BGA package.
• Very low operation voltage : 2.7 ~ 3.6V
• Very low power consumption :
Vcc = 3.0V
C-grade: 20mA (Max.) operating current
I -grade: 25mA (Max.) operating current
0.5uA (Typ.) CMOS standby current
• High speed access time :
-70
-10
70ns (Max.) at Vcc = 3.0V
100ns (Max.) at Vcc = 3.0V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE and OE options
• I/O Configuration x8/x16 selectable by LB and UB pin
PRODUCT FAMILY
POWER DISSIPATION
SPEED
( ns )
STANDBY
Operating
PRODUCT
FAMILY
OPERATING
TEMPERATURE
Vcc
RANGE
( ICCSB1, Max )
( ICC, Max )
PKG TYPE
Vcc=3.0V
Vcc=3.0V
8uA
Vcc=3.0V
20mA
BS616LV4010DC
BS616LV4010EC
BS616LV4010AC
BS616LV4010BC
BS616LV4010DI
BS616LV4010EI
BS616LV4010AI
BS616LV4010BI
DICE
TSOP2-44
BGA-48-0608
BGA-48-0810
DICE
TSOP2-44
BGA-48-0608
BGA-48-0810
+0 O C to +70O
-40O C to +85O
C
C
2.7V ~ 3.6V
2.7V ~ 3.6V
70 / 100
70 / 100
12uA
25mA
PIN CONFIGURATIONS
BLOCK DIAGRAM
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A4
A5
A6
A7
OE
UB
LB
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
A3
A2
A1
A0
CE
DQ0
DQ1
DQ2
DQ3
VCC
GND
DQ4
DQ5
DQ6
DQ7
WE
DQ15
DQ14
DQ13
DQ12
GND
VCC
DQ11
DQ10
DQ9
DQ8
NC
A8
A9
A10
A11
A12
A4
A3
A2
BS616LV4010EC
BS616LV4010EI
A1
A0
Address
Input
22
2048
A17
A16
Row
Decoder
Memory Array
2048 x 2048
Buffer
18
19
20
21
A17
A16
A15
A14
A15
A14
A13
A12
22
A13
2048
Data
Input
16
16
Column I/O
DQ0
Buffer
.
.
.
.
.
.
.
.
Write Driver
Sense Amp
16
128
Data
Output
16
Buffer
Column Decoder
DQ15
14
CE
WE
OE
UB
Control
Address Input Buffer
LB
A11 A10 A9 A8 A7
A6 A5
Vcc
Gnd
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.
Revision 2.4
R0201-BS616LV4010
1
Jan.
2004