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AZ100LVEL16VRLR2 PDF预览

AZ100LVEL16VRLR2

更新时间： 2024-11-09 22:06:03
品牌 Logo 应用领域
其他 - ETC 振荡器
页数 文件大小 规格书
6页 180K
描述
ECL/PECL Oscillator Gain Stage & Buffer with Selectable Enable

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AZ100LVEL16VRLR2 数据手册

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ARIZONA MICROTEK, INC.  
AZ100LVEL16VR  
ECL/PECL Oscillator Gain Stage & Buffer with Selectable Enable  
FEATURES  
PACKAGE AVAILABILITY  
•
•
•
•
•
High Bandwidth for ≥1GHz  
PACKAGE  
PART NO.  
MARKING  
Similar Operation as AZ100EL16VO  
Operating Range of 3.0V to 5.5V  
Minimizes External Components  
Selectable Enable Polarity and Threshold  
(CMOS/TTL or PECL)  
MLP 16  
AZ100LVEL16VRL  
AZM16R  
MLP 16 T&R AZ100LVEL16VRLR1 AZM16R  
MLP 16 T&R AZ100LVEL16VRLR2 AZM16R  
DIE  
AZ100LVEL16VRX  
N/A  
•
Available in a 3x3mm MLP Package  
DESCRIPTION  
The AZ100LVEL16VR is a specialized oscillator gain stage with high gain output buffer including an enable.  
The QHG/Q¯HG outputs have a voltage gain several times greater than the Q/Q¯ outputs.  
The AZ100LVEL16VR provides a selectable enable that allows continuous oscillator operation. See truth table  
below for enable function. If Enable pull-up is desired in the CMOS mode, an external ≤20kΩ resistor connecting  
EN to VCC will override the on-chip pull-down resistor. The AZ100LVEL16VR also provides a VBB and 470Ω  
internal bias resistors from D to VBB and D¯ to VBB. The VBB pin can support 1.5mA sink/source current. Bypassing  
VBB to ground with a 0.01 µF capacitor is recommended.  
Outputs Q/Q¯ each have a selectable on-chip pull-down current source. See truth table below for current source  
functions. External resistors may also be used to increase pull-down current to a maximum total of 25mA.  
Outputs QHG/Q¯HG each have an optional on-chip pull-down current source of 10mA. When pad/pin VEEP is left  
open (NC), the output current sources are disabled and the QHG /Q¯HG operate as standard PECL/ECL. When VEEP is  
connected to VEE , the current sources are activated. The QHG /Q¯HG pull-down current can be decreased, by using a  
resistor to connect from VEEP to VEE.  
NOTE: Specifications in the ECL/PECL tables are valid when thermal equilibrium is established.  
1630 S. STAPLEY DR., SUITE 125 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541  
www.azmicrotek.com  
123456

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