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ATC600F8R2JT250XT

更新时间： 2024-11-27 01:11:43
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恩智浦 - NXP /
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18页 576K
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RF LDMOS Wideband Integrated Power Amplifiers

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Document Number: MDE6IC7120N  
Rev. 0, 10/2009  
Freescale Semiconductor  
Technical Data  
RF LDMOS Wideband Integrated  
Power Amplifiers  
The MDE6IC7120N/GN wideband integrated circuit is designed with  
on-chip matching that makes it usable from 728 to 768 MHz. This multi-stage  
structure is rated for 26 to 32 Volt operation and covers all typical cellular base  
station modulation formats.  
MDE6IC7120NR1  
MDE6IC7120GNR1  
• Typical Doherty Single-Carrier W-CDMA Performance: VDD = 28 Volts,  
IDQ1A = IDQ1B = 80 mA, IDQ2A = 550 mA, VG2B = 2.3 Vdc, Pout = 25 Watts  
Avg., IQ Magnitude Clipping, Channel Bandwidth = 3.84 MHz, Input Signal  
PAR = 7.5 dB @ 0.01% Probability on CCDF.  
728-768 MHz, 25 W AVG., 28 V  
SINGLE W-CDMA  
RF LDMOS WIDEBAND  
INTEGRATED POWER AMPLIFIERS  
G
PAE  
(%)  
Output PAR  
(dB)  
ACPR  
(dBc)  
ps  
Frequency  
728 MHz  
748 MHz  
768 MHz  
(dB)  
35.0  
34.4  
33.8  
42.0  
40.6  
39.1  
6.2  
6.8  
6.9  
-39.0  
-41.3  
-37.3  
CASE 1866-02  
TO-270 WBL-16  
PLASTIC  
MDE6IC7120NR1  
• Capable of Handling 10:1 VSWR, @ 32 Vdc, 748 MHz, 104 Watts CW  
Output Power (2 dB Input Overdrive from Rated Pout), Designed for  
Enhanced Ruggedness  
• Stable into a 5:1 VSWR. All Spurs Below -60 dBc @ 100 mW to  
120 Watts CW Pout  
• Typical Pout @ 1 dB Compression Point ] 120 Watts CW  
CASE 1867-02  
TO-270 WBL-16 GULL  
PLASTIC  
Features  
• Production Tested in a Symmetrical Doherty Configuration  
• 100% PAR Tested for Guaranteed Output Power Capability  
MDE6IC7120GNR1  
• Characterized with Series Equivalent Large-Signal Impedance Parameters  
and Common Source S-Parameters  
• On-Chip Matching (50 Ohm Input, DC Blocked)  
• Integrated Quiescent Current Temperature Compensation with Enable/Disable Function (1)  
• Integrated ESD Protection  
• 225°C Capable Plastic Package  
• RoHS Compliant  
• In Tape and Reel. R1 Suffix = 500 Units per 44 mm, 13 inch Reel  
V
GS1A  
(2)  
V
GND  
RF  
1
2
3
CARRIER  
RF /V  
GS1A  
inA  
RF  
inA  
out1 DS2A  
16  
15  
GND  
NC  
4
5
RF /V  
out1 DS2A  
V
V
V
6
7
8
9
10  
11  
12  
13  
14  
GS2A  
V
GS2A  
Quiescent Current  
Temperature Compensation  
DS1A  
DS1B  
(1)  
V
DS1A  
V
GS2B  
NC  
RF /V  
out2 DS2B  
V
DS1B  
GS2B  
GND  
RF  
GND  
(2)  
PEAKING  
RF /V  
V
inB  
RF  
inB  
out2 DS2B  
V
GS1B  
(Top View)  
V
GS1B  
Quiescent Current  
Temperature Compensation  
(1)  
Note: Exposed backside of the package is  
the source terminal for the transistors.  
Figure 1. Functional Block Diagram  
Figure 2. Pin Connections  
1. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family and to AN1987, Quiescent Current Control  
for the RF Integrated Circuit Device Family. Go to http://www.freescale.com/rf. Select Documentation/Application Notes - AN1977 or AN1987.  
2. Peaking and Carrier orientation is determined by the test fixture design.  
© Freescale Semiconductor, Inc., 2009. All rights reserved.  
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