Preliminary Datasheet
2A DDR TERMINATION REGULATOR
AP2303
General Description
Features
·
Support Both DDR I (1.25V ) and DDR II
TT
The AP2303 linear regulator is designed to meet the
JEDEC specification SSTL-2 and SSTL-18 for termi-
nation of DDR-SDRAM. The regulator can sink or
source up to 2A current continuously, providing
(0.9V ) Requirements
TT
·
·
·
Source and Sink Current up to 2A
High Accuracy Output Voltage at Full-load
enough current for most DDR applications. V
is
OUT
Adjustable V
by External Resistors
OUT
designed to track the V
voltage within a ± 20mV
REF
·
Shutdown for Standby or Suspend Mode
Operation with High-impedance Output
tolerance over the entire current range while prevent-
ing shooting through on the output stage. On-chip ther-
mal limiting provides protection against a combination
of high current and ambient temperature which would
create an excessive junction temperature.
Applications
The AP2303, used in conjunction with series termina-
tion resistors, provides an excellent voltage source for
active termination schemes of high speed transmission
lines as those seen in high speed memory buses and
distributed backplane designs.
·
·
·
DDR-SDRAM Termination
DDR-II Termination
SSTL-2 Termination
The AP2303 is available in SOIC-8 and TO-252-5
packages.
TO-252-5
SOIC-8
Figure 1. Package Types of AP2303
BCD Semiconductor Manufacturing Limited
Jun. 2005 Rev. 1. 0
1