Datasheet > ADSP-TS101SAB1Z-100

ADSP-TS101SAB1Z-100

更新时间： 2024-11-06 03:10:55

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
48页	679K
描述
64-BIT, 100MHz, OTHER DSP, PBGA625, 27 X 27 MM, PLASTIC, MS-034, BGA-625

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TigerSHARC

Embedded Processor

ADSP-TS101S

FEATURES

BENEFITS

300 MHz, 3.3 ns instruction cycle rate

Provides high performance Static Superscalar DSP opera-

tions, optimized for telecommunications infrastructure

and other large, demanding multiprocessor DSP

applications

6M bits of internal—on-chip—SRAM memory

19 mm × 19 mm (484-ball) or 27 mm × 27 mm

(625-ball) PBGA package

Performs exceptionally well on DSP algorithm and I/O bench-

marks (see benchmarks in Table 1 and Table 2)

Supports low overhead DMA transfers between internal

memory, external memory, memory-mapped peripherals,

link ports, other DSPs (multiprocessor), and host

processors

Eases DSP programming through extremely flexible instruc-

tion set and high-level language-friendly DSP architecture

Enables scalable multiprocessing systems with low commu-

nications overhead

Dual computation blocks—each containing an ALU, a multi-

plier, a shifter, and a register file

Dual integer ALUs, providing data addressing and pointer

manipulation

Integrated I/O includes 14-channel DMA controller, external

port, 4 link ports, SDRAM controller, programmable flag

pins, 2 timers, and timer expired pin for system integration

1149.1 IEEE compliant JTAG test access port for on-chip

emulation

On-chip arbitration for glueless multiprocessing with up to

8 TigerSHARC processors on a bus

COMPUTATIONAL BLOCKS

SHIFTER

PROGRAM SEQUENCER

PC BTB IRQ

DATA ADDRESS GENERATION

INTERNAL MEMORY

JTAG PORT

MEMORY MEMORY MEMORY

INTEGER

J ALU

INTEGER

K ALU

64K × 32

ADDR

SDRAM CONTROLLER

32 × 32

IAB

FETCH

ALU

MULTIPLIER

EXTERNAL PORT

M0 ADDR

M0 DATA

MULTIPROCESSOR

INTERFACE

128

FILE

32 × 32

HOST INTERFACE

INPUT FIFO

ADDR

M1 ADDR

M1 DATA

128 128

DAB

128

DATA

OUTPUT BUFFER

OUTPUT FIFO

DAB

M2 ADDR

M2 DATA

128

CNTRL

128 128

CLUSTER BUS

ARBITER

I/O ADDRESS

I/O PROCESSOR

FILE

32 × 32

DMA

CONTROLLER

LINK PORT

CONTROLLER

MULTIPLIER

ALU

DMA ADDRESS

DMA DATA

LINK

PORTS

32 256

256

LINK DATA

CONTROL/

STATUS/

TCBs

CONTROL/

STATUS/

BUFFERS

SHIFTER

Figure 1. Functional Block Diagram

TigerSHARC and the TigerSHARC logo are registered trademarks of Analog Devices, Inc.

Rev. C

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O.Box 9106, Norwood, MA 02062-9106 U.S.A.

Tel: 781/329-4700

Fax: 781/326-8703

www.analog.com

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ADSP-TS101SAB1Z-100 替代型号

型号	品牌	替代类型	描述	数据表
ADSP-TS101SAB1-100	ADI	完全替代	Embedded Processor

与ADSP-TS101SAB1Z-100相关器件

型号	品牌	获取价格	描述	数据表
ADSP-TS101SAB2-000	ADI	获取价格	Embedded Processor
ADSP-TS101SAB2-100	ADI	获取价格	Embedded Processor
ADSP-TS101SAB2Z000	ADI	获取价格	TigerSHARC Embedded Processor
ADSP-TS101SAB2Z-000	ADI	获取价格	64-BIT, 250MHz, OTHER DSP, PBGA484, 19 X 19 MM, PLASTIC, BGA-484
ADSP-TS101SAB2Z100	ADI	获取价格	TigerSHARC Embedded Processor
ADSP-TS101SAB2Z-100	ADI	获取价格	64-BIT, 100MHz, OTHER DSP, PBGA484, 19 X 19 MM, PLASTIC, BGA-484
ADSP-TS101SKB1250X	ADI	获取价格	IC 64-BIT, 125 MHz, OTHER DSP, PBGA625, 27 X 27 MM, METRIC, PLASTIC, BGA-625, Digital Sign
ADSP-TS101SKB2250X	ADI	获取价格	IC 64-BIT, 125 MHz, OTHER DSP, PBGA484, 19 X 19 MM, METRIC, PLASTIC, BGA-484, Digital Sign
ADSP-TS201S	ADI	获取价格	Embedded Processor
ADSP-TS201S_06	ADI	获取价格	TigerSHARC-R Embedded Processor

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