TigerSHARC®
Embedded Processor
Preliminary Technical Data
ADSP-TS201S
KEY FEATURES
KEY BENEFITS
Up to 600 MHz, 1.67 ns Instruction Cycle Rate
24M Bits of Internal—On-Chip—DRAM Memory
25×25 mm (576-Ball) Thermally Enhanced Ball Grid Array
Package
Dual Computation Blocks—Each Containing an ALU, a Multi-
plier, a Shifter, a Register File, and a Communications Logic
Unit (CLU)
Dual Integer ALUs, providing Data Addressing and Pointer
Manipulation
Integrated I/O Includes 14 Channel DMA Controller, External
Port, Four Link Ports, SDRAM Controller, Programmable
Flag Pins, Two Timers, and Timer Expired Pin for System
Integration
Provides High-Performance Static Superscalar DSP Opera-
tions, Optimized for Telecommunications Infrastructure
and Other Large, Demanding Multiprocessor DSP
Applications
Performs Exceptionally Well on DSP Algorithm and I/O
Benchmarks (See Benchmarks in Table 1)
Supports Low-Overhead DMA Transfers Between Internal
Memory, External Memory, Memory-Mapped Peripherals,
Link Ports, Host Processors, and Other (Multiprocessor)
DSPs
Eases DSP Programming Through Extremely Flexible Instruc-
tion Set and High-Level-Language Friendly DSP
Architecture
Enables Scalable Multiprocessing Systems With Low Commu-
nications Overhead
1149.1 IEEE Compliant JTAG Test Access Port for On-Chip
Emulation
On-Chip Arbitration for Glueless Multiprocessing
JTAG PORT
6
DATA ADDRESS GENERATION
24M BITS INTERNAL MEMORY
SOC BUS
32
32
MEMORY BLOCKS
(PAGE CACHE)
INTEGER
J ALU
INTEGER
K ALU
JTAG
EXTERNAL
PORT
32X32
32X32
4xCROSSBAR CONNECT
PROGRAM
SEQUENCER
32
A
A
A
A
D
D
D
D
ADDR
HOST
32
128
32
J-BUS ADDR
J-BUS DATA
K-BUS ADDR
K-BUS DATA
I-BUS ADDR
I-BUS DATA
ADDR
FETCH
64
8
MULTI
PROC
DATA
CTRL
CTRL
SDRAM
CTRL
10
BTB
C-BUS
ARB
128
32
EXT DMA
REQ
4
128
DMA
PC
LINK PORTS
4
32
S-BUS ADDR
S-BUS DATA
8
4
8
4
IN
L0
L1
L2
L3
128
OUT
IAB
T
8
4
8
4
IN
OUT
8
4
8
4
IN
128
128
128
OUT
X
Y
8
4
8
IN
REGISTER
FILE
32x32
REGISTER
FILE
32x32
128
DAB
DAB
OUT
COMPUTATIONAL BLOCKS
Figure 1. Functional block diagram
TigerSHARC and the TigerSHARC logo are registered trademarks of Analog Devices, Inc.
Rev. PrH
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However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
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registered trademarks are the property of their respective owners.
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