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ADSP-21363KBCZ-1AA PDF预览

ADSP-21363KBCZ-1AA

更新时间: 2024-02-25 02:04:44
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亚德诺 - ADI /
页数 文件大小 规格书
52页 2274K
描述
SHARC Processor

ADSP-21363KBCZ-1AA 数据手册

 浏览型号ADSP-21363KBCZ-1AA的Datasheet PDF文件第43页浏览型号ADSP-21363KBCZ-1AA的Datasheet PDF文件第44页浏览型号ADSP-21363KBCZ-1AA的Datasheet PDF文件第45页浏览型号ADSP-21363KBCZ-1AA的Datasheet PDF文件第47页浏览型号ADSP-21363KBCZ-1AA的Datasheet PDF文件第48页浏览型号ADSP-21363KBCZ-1AA的Datasheet PDF文件第49页 
ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366  
OUTPUT DRIVE CURRENTS  
CAPACITIVE LOADING  
Figure 37 shows typical I-V characteristics for the output driv-  
ers of the ADSP-2136x. The curves represent the current drive  
capability of the output drivers as a function of output voltage.  
Output delays and holds are based on standard capacitive loads:  
30 pF on all pins (see Figure 38). Figure 42 shows graphically  
how output delays and holds vary with load capacitance. The  
graphs of Figure 40, Figure 41, and Figure 42 may not be linear  
outside the ranges shown for Typical Output Delay vs. Load  
Capacitance and Typical Output Rise Time (20% to 80%,  
V = Min) vs. Load Capacitance.  
40  
V
OH  
30  
20  
3.3V, +25°C  
3.47V, -45°C  
12  
10  
10  
0
3.11V, +125°C  
RISE  
y = 0.0467x + 1.6323  
FALL  
-
10  
8
3.11V, +125°C  
-
20  
3.3V, +25°C  
3.5  
6
V
-
-
30  
40  
OL  
3.47V,  
1.0  
-
45°C  
4
y = 0.045x + 1.524  
0
0.5  
1.5  
2.0  
2.5  
3.0  
SWEEP (VDDEXT) VOLTAGE (V)  
2
0
Figure 37. ADSP-2136x Typical Drive  
50  
100  
150  
200  
250  
0
TEST CONDITIONS  
LOAD CAPACITANCE (pF)  
The ac signal specifications (timing parameters) appear in  
Table 14 on Page 21 through Table 40 on Page 45. These include  
output disable time, output enable time, and capacitive loading.  
The timing specifications for the SHARC apply for the voltage  
reference levels in Figure 38.  
Figure 40. Typical Output Rise/Fall Time  
(20% to 80%, VDDEXT = Max)  
Timing is measured on signals when they cross the 1.5 V level as  
described in Figure 39. All delays (in nanoseconds) are mea-  
sured between the point that the first signal reaches 1.5 V and  
the point that the second signal reaches 1.5 V.  
12  
10  
RISE  
y = 0.049x + 1.5105  
FALL  
8
6
4
2
0
50  
TO  
OUTPUT  
PIN  
1.5V  
y = 0.0482x + 1.4604  
30pF  
Figure 38. Equivalent Device Loading for AC Measurements  
(Includes All Fixtures)  
0
50  
100  
150  
200  
250  
LOAD CAPACITANCE (pF)  
Figure 41. Typical Output Rise/Fall Time  
(20% to 80%, VDDEXT = Min)  
INPUT  
OR  
1.5V  
1.5V  
OUTPUT  
Figure 39. Voltage Reference Levels for AC Measurements  
Rev. A  
|
Page 46 of 52  
|
December 2006  

ADSP-21363KBCZ-1AA 替代型号

型号 品牌 替代类型 描述 数据表
ADSP-21363KBC-1AA ADI

完全替代

SHARC Processor

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