Data Sheet
ADRF5347
High Linearity, Silicon SP4T Switch, 1.8 GHz to 3.8 GHz
FEATURES
FUNCTIONAL BLOCK DIAGRAM
► Low insertion loss
► 0.35 dB to 2.8 GHz typical
► 0.42 dB to 3.8 GHz typical
► High input linearity, IP3: 84 dBm typical
► High power handling at TCASE = 105°C
► Long-term (>10 years) average
► Continuous wave power: 39 dBm
► LTE signal
► Average power: 39 dBm
► Peak power: 49 dBm
► Fast 0.1 dB settling time : 720 ns typical
► ESD ratings
► HBM: 1000 V, Class 1B
Figure 1. Functional Block Diagram
► CDM: 750 V, Class C4
► Positive control, LVCMOS-/LVTTL- compatible
► 4 mm x 4 mm, 20-terminal LGA package
GENERAL DESCRIPTION
The ADRF5347 is a high linearity, reflective, single-pole, four-throw
(SP4T) switch manufactured in the silicon process.
APPLICATIONS
The ADRF5347 operates from 1.8 GHz to 3.8 GHz with a typical
insertion loss lower than 0.42 dB and a typical input IP3 of 84 dBm.
The device has an RF input power handling capability of 39 dBm for
continuous wave signals and 39 dBm average and 49 dBm peak for
long-term evolution (LTE) signals.
► 5G antenna tilting and beamforming
► Wireless infrastructure
► Military and high reliability applications
► Test equipment
► Pin diode replacement
The ADRF5347 draws a current of 2.5 mA on the positive supply
of +5.0 V and 0.4 mA on the negative supply of −3.4 V. The device
employs low voltage complementary metal-oxide semiconductor
(LVCMOS)-/low voltage transistor-to-transistor logic (LVTTL)- com-
patible controls.
The ADRF5347 comes in a 4 mm × 4 mm, 20-terminal, RoHS-com-
pliant, land grid array (LGA) package and operates between −40°C
to +105°C.
Excellent return loss and IP3 enable ADRF5347 to be used in
back-to-back configuration for phase shifting architectures. See the
Back-to-Back Phase Shifter Reference Design section for more
information.
Rev. 0
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