Datasheet > ADRF5515A

ADRF5515A

更新时间： 2024-09-25 14:57:47

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
15页	1601K
描述
双通道，3.3 GHz至4.0 GHz，20 W接收器前端

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ADRF5515A 数据手册

Data Sheet

ADRF5515A

Dual-Channel, 3.3 GHz to 4.0 GHz, 20 W Receiver Front End

FEATURES

FUNCTIONAL BLOCK DIAGRAM

► Integrated dual-channel RF front end

► 2-stage LNA and high power silicon SPDT switch

► On-chip bias and matching

► Single-supply operation

► High power handling at T_CASE= 105°C

► LTE average power (9 dB PAR) full lifetime: 43 dBm

► Gain

► High gain mode: 36 dB typical at 3.6 GHz

► Low gain mode: 17 dB typical at 3.6 GHz

► Low noise figure

► High gain mode: 1.05 dB typical at 3.6 GHz

► Low gain mode: 1.05 dB typical at 3.6 GHz

► High isolation

► RXOUT-CHA and RXOUT-CHB: 47 dB typical

► TERM-CHA and TERM-CHB: 75 dB typical

► Low insertion loss: 0.5 dB typical at 3.6 GHz

► High OIP3: 35 dBm typical

Figure 1.

GENERAL DESCRIPTION

The ADRF5515A is a dual-channel, integrated RF, front-end, mul-

tichip module designed for time division duplexing (TDD) appli-

cations. The device operates from 3.3 GHz to 4.0 GHz. The

ADRF5515A is configured in dual channels with a cascading,

two-stage low noise amplifier (LNA) and a high-power silicon single-

pole, double-throw (SPDT) switch.

► Power-down mode and low gain mode

► Low supply current

► High gain mode: 95 mA typical at 5 V

► Low gain mode: 48 mA typical at 5 V

► Power-down mode: 13 mA typical at 5 V

► Positive logic control

► 6 mm × 6 mm, 40-lead LFCSP package

► Pin compatible with the ADRF5515 and the ADRF5519, and the

10 W versions, ADRF5545A and ADRF5549

In high gain mode, the cascaded two-stage LNA and switch offer a

low noise figure of 1.05 dB and a high gain of 36 dB at 3.6 GHz,

with an output third-order intercept (OIP3) point of 35 dBm (typical).

In low gain mode, one stage of the two-stage LNA is in bypass,

providing 17 dB of gain at a lower current of 48 mA. In power-down

mode, the LNAs are turned off and the device draws 13 mA.

In transmit operation, when RF inputs are connected to a termi-

nation pin (TERM-CHA or TERM-CHB), the switch provides low

insertion loss of 0.5 dB and handles long-term evolution (LTE)

average power (9 dB peak to average ratio (PAR)) of 43 dBm for

full lifetime operation.

APPLICATIONS

► Wireless infrastructure

► TDD massive multiple input and multiple output and active

antenna systems

The device comes in an RoHS-compliant, compact, 6 mm × 6 mm,

40-lead lead frame chip scale package (LFCSP).

► TDD-based communication systems

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable "as is". However, no responsibility is assumed by Analog

Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to

change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

DOCUMENT FEEDBACK

TECHNICAL SUPPORT

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与ADRF5515A相关器件

型号	品牌	获取价格	描述	数据表
ADRF5519	ADI	获取价格	双通道，2.3 GHz至2.8 GHz，20 W接收器前端
ADRF5534	ADI	获取价格	3.1 GHz to 4.2 GHz, Receiver Front End
ADRF5545A	ADI	获取价格	Dual-Channel, 2.4 GHz to 4.2 GHz Receiver Front End
ADRF5545ABCPZN	ADI	获取价格	Dual-Channel, 2.4 GHz to 4.2 GHz Receiver Front End
ADRF5545ABCPZN-R7	ADI	获取价格	Dual-Channel, 2.4 GHz to 4.2 GHz Receiver Front End
ADRF5545ABCPZN-RL	ADI	获取价格	Dual-Channel, 2.4 GHz to 4.2 GHz Receiver Front End
ADRF5545A-EVALZ	ADI	获取价格	Dual-Channel, 2.4 GHz to 4.2 GHz Receiver Front End
ADRF5547	ADI	获取价格	双通道 3.7 GHz 至 5.3 GHz 接收器前端
ADRF5549	ADI	获取价格	接收器前端、双通道、1.8 GHz 至 2.8 GHz
ADRF5700	ADI	获取价格	46 dB, 2 dB LSB, 5-Bit, Silicon Digital Attenuator, 100 MHz to 22 GHz

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