5秒后页面跳转
ADRF5534 PDF预览

ADRF5534

更新时间: 2024-09-25 14:57:51
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
11页 680K
描述
3.1 GHz to 4.2 GHz, Receiver Front End

ADRF5534 数据手册

 浏览型号ADRF5534的Datasheet PDF文件第2页浏览型号ADRF5534的Datasheet PDF文件第3页浏览型号ADRF5534的Datasheet PDF文件第4页浏览型号ADRF5534的Datasheet PDF文件第5页浏览型号ADRF5534的Datasheet PDF文件第6页浏览型号ADRF5534的Datasheet PDF文件第7页 
Data Sheet  
ADRF5534  
3.1 GHz to 4.2 GHz, Receiver Front End  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Integrated RF front end  
LNA and high-power silicon SPDT switch  
On-chip bias and matching  
Single-supply operation  
Gain: 35.5 dB typical at 3.6 GHz  
Gain flatness: 1.5 dB at 25°C across 400 MHz bandwidth  
Low noise figure: 1.3 dB typical at 3.6 GHz  
Low insertion loss: 0.8 dB typical at 3.6 GHz  
High-power handling at TCASE = 105°C  
Full lifetime  
LTE average power (8 dB PAR): 37 dBm  
Single event (<10 sec operation)  
LTE average power (8 dB PAR): 39 dBm  
High Input IP3: −4 dBm  
Figure 1.  
GENERAL DESCRIPTION  
Low-supply current  
The ADRF5534 is an integrated RF, front-end multichip module  
designed for time division duplex (TDD) applications. The device  
operates from 3.1 GHz to 4.2 GHz. The ADRF5534 is configured  
with an LNA and a high-power, silicon, SPDT switch.  
Receive operation: 120 mA typical at 5 V  
Transmit operation: 15 mA typical at 5 V  
Positive logic control  
5 mm × 3 mm, 24-lead LFCSP package  
In the receive operation at 3.6 GHz, the LNA offers a low noise  
figure (NF) of 1.3 dB and a high gain of 35.5 dB with a third order  
input intercept point (IIP3) of −4 dBm.  
APPLICATIONS  
Wireless infrastructure  
TDD massive multiple input and multiple output (MIMO) and  
active antenna systems  
In the transmit operation, the switch provides a low insertion loss  
of 0.8 dB and handles a long-term evolution (LTE) average power  
of 37 dBm for a full lifetime operation (8 dB peak to average ratio  
(PAR)) and 39 dBm for a single event (<10 sec) LNA protection  
operation.  
TDD-based communication systems  
The device is featured in an RoHS compliant, compact, 5 mm × 3  
mm, 24-lead LFCSP package.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable "as is". However, no responsibility is assumed by Analog  
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to  
change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
DOCUMENT FEEDBACK  
TECHNICAL SUPPORT  

与ADRF5534相关器件

型号 品牌 获取价格 描述 数据表
ADRF5545A ADI

获取价格

Dual-Channel, 2.4 GHz to 4.2 GHz Receiver Front End
ADRF5545ABCPZN ADI

获取价格

Dual-Channel, 2.4 GHz to 4.2 GHz Receiver Front End
ADRF5545ABCPZN-R7 ADI

获取价格

Dual-Channel, 2.4 GHz to 4.2 GHz Receiver Front End
ADRF5545ABCPZN-RL ADI

获取价格

Dual-Channel, 2.4 GHz to 4.2 GHz Receiver Front End
ADRF5545A-EVALZ ADI

获取价格

Dual-Channel, 2.4 GHz to 4.2 GHz Receiver Front End
ADRF5547 ADI

获取价格

双通道 3.7 GHz 至 5.3 GHz 接收器前端
ADRF5549 ADI

获取价格

接收器前端、双通道、1.8 GHz 至 2.8 GHz
ADRF5700 ADI

获取价格

46 dB, 2 dB LSB, 5-Bit, Silicon Digital Attenuator, 100 MHz to 22 GHz
ADRF5714 ADI

获取价格

Silicon Digital Attenuator, 1-Bit, 100 MHz to 30 GHz
ADRF5715 ADI

获取价格

Silicon Digital Attenuator, 1-Bit, 1 MHz to 30 GHz