Datasheet > ADP5033ACBZ-3-R7

ADP5033ACBZ-3-R7

更新时间： 2024-11-23 20:56:47

品牌	Logo	应用领域
亚德诺 - ADI		信息通信管理开关输出元件
页数	文件大小	规格书
29页	878K
描述
Dual 3 MHz, 800 mA Buck Regulators with Two 300 mA LDOs

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ADP5033ACBZ-3-R7 数据手册

Dual 3 MHz, 800 mA Buck

Regulators with Two 300 mA LDOs

Data Sheet

ADP5033

FEATURES

TYPICAL APPLICATION CIRCUIT

ADP5033

Main input voltage range: 2.3 V to 5.5 V

Two 800 mA buck regulators and two 300 mA LDOs

Tiny, 16-ball, 2 mm × 2 mm WLCSP package

Regulator accuracy: 1.8%

Factory programmable VOUTx

3 MHz buck operation with forced PWM and auto PWM/PSM

modes

BUCK1/BUCK2: output voltage range from 0.8 V to 3.8 V

LDO1/LDO2: output voltage range from 0.8 V to 5.2 V

LDO1/LDO2: low input supply voltage from 1.7 V to 5.5 V

LDO1/LDO2: high PSRR and low output noise

L1 1µH

VOUT1

SW1

2.3V

VIN1

VOUT1

800mA

4.7µF

5.5V

BUCK1

PGND1

MODE

10µF

EN1

MODE

EN2

ENA

ENB

VIN2

OFF

PWM

EN3

EN4

PSM/PWM

MODE

L2 1µH

VOUT2

800mA

SW2

4.7µF

VOUT2

BUCK2

10µF

PGND2

VOUT3

EN2

EN3

VOUT3

300mA

1.7V

5.5V

VIN3

VIN4

LDO1

(ANALOG)

APPLICATIONS

1µF

Power for processors, ASICS, FPGAs, and RF chipsets

Portable instrumentation and medical devices

Space constrained devices

1µF

EN4

VOUT4

LDO2

(DIGITAL)

1µF

300mA

1µF

AGND

Figure 1.

GENERAL DESCRIPTION

The ADP5033 combines two high performance buck regulators

and two low dropout regulators (LDO) in a tiny, 16-ball, 2 mm ×

2 mm WLCSP to meet demanding performance and board space

requirements.

The regulators in the ADP5033 are activated by the ENA and ENB

pins. The specific channels controlled by ENA and ENB are set

by factory programming. A high voltage level applied to the enable

pins activates the regulators. The default output voltages are

factory programmable and can be set to a wide range of options.

The high switching frequency of the buck regulators enables tiny

multilayer external components and minimizes the board space.

When the MODE pin is set high, the buck regulators operate in

forced PWM mode. When the MODE pin is set low, the buck

regulators operate in PWM mode when the load current is above

a predefined threshold. When the load current falls below a

predefined threshold, the regulator operates in power save

mode (PSM), improving the light load efficiency.

Table 1. Family Models

Maximum

Model

Channels

Current

Package

ADP5023 2 Bucks, 1 LDO

ADP5024 2 Bucks, 1 LDO

ADP5034 2 Bucks, 2 LDOs

800 mA, 300 mA LFCSP (CP-24-10)

1.2 A, 300 mA

LFCSP (CP-24-10)

LFCSP (CP-24-10),

TSSOP (RE-28-1)

ADP5037 2 Bucks, 2 LDOs

ADP5033 2 Bucks, 2 LDOs with

2 EN pins

800 mA, 300 mA LFCSP (CP-24-10)

800 mA, 300 mA WLCSP (CB-16-8)

The two bucks operate out of phase to reduce the input capacitor

requirement and noise.

ADP5040 1 Buck, 2 LDOs

1.2 A, 300 mA

LFCSP (CP-20-10)

The low quiescent current, low dropout voltage, and wide input

voltage range of the ADP5033 LDO extend the battery life of

portable devices. The ADP5033 LDOs maintain power supply

rejection greater than 60 dB for frequencies as high as 10 kHz

while operating with a low headroom voltage.

ADP5041 1 Buck, 2 LDOs with

Supervisory, Watchdog,

Manual Reset

ADP5133 2 Bucks with 2 ENx pins

ADP5134 2 Bucks, 2 LDOs with

precision enable and

800 mA

1.2 A, 300 mA

WLCSP (CB-16-8)

LFCSP (CP-24-10)

power-good output

Rev. G

Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rightsof third parties that may result fromits use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks andregisteredtrademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Technical Support

www.analog.com

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ADP5034-1-EVALZ	ADI	获取价格	Dual 3 MHz, 1200 mA Buck Regulators with Two 300 mA LDOs
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