Datasheet > ADP5024

ADP5024

更新时间： 2024-02-15 18:56:44

品牌	Logo	应用领域
亚德诺 - ADI		稳压器
页数	文件大小	规格书
28页	758K
描述
Dual 3 MHz, 800 mA Buck Regulators with Two 300 mA LDOs

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ADP5024 数据手册

Dual 3 MHz, 800 mA Buck

Regulators with Two 300 mA LDOs

ADP5037

Data Sheet

load is above a predefined threshold, the buck regulators

operate in PWM mode. When the load current falls below a

predefined threshold, the regulator operates in power save

mode (PSM), improving the light-load efficiency.

FEATURES

Main input voltage range: 2.3 V to 5.5 V

Two 800 mA buck regulators and two 300 mA LDOs

24-lead, 4 mm × 4 mm LFCSP package

Regulator accuracy: 1.8ꢀ

Table 1. Family Models

Factory programmable or external adjustable VOUTx

3 MHz buck operation with forced PWM and auto PWM/PSM

modes

BUCK1/BUCK2: output voltage range from 0.8 V to 3.8 V

LDO1/LDO2: output voltage range from 0.8 V to 5.2 V

LDO1/LDO2: input supply voltage from 1.7 V to 5.5 V

LDO1/LDO2: high PSRR and low output noise

Maximum

Current

Model

Channels

Package

ADP5023 2 Buck, 1 LDO

ADP5024 2 Buck, 1 LDO

ADP5034 2 Buck, 2 LDOs

ADP5037 2 Buck, 2 LDOs

800 mA,

300 mA

LFCSP (CP-24-10)

1.2 A,

300 mA

LFCSP (CP-24-10)

1.2 A,

300 mA

LFCSP (CP-24-10),

TSSOP (RE-28-1)

800 mA,

300 mA

LFCSP (CP-24-10)

APPLICATIONS

ADP5033 2 Buck, 2 LDOs with 800 mA,

2 EN pins 300 mA

WLCSP (CB-16-8)

Power for processors, ASICS, FPGAs, and RF chipsets

Portable instrumentation and medical devices

Space constrained devices

The two bucks operate out of phase to reduce the input capaci-

tor requirement. The low quiescent current, low dropout voltage,

and wide input voltage range of the ADP5037 LDOs extend the

battery life of portable devices. The ADP5037 LDOs maintain

power supply rejection greater than 60 dB for frequencies as

high as 10 kHz while operating with a low headroom voltage.

GENERAL DESCRIPTION

The ADP5037 combines two high performance buck regulators

and two low dropout (LDO) regulators in a small, 24-lead 4 mm ×

4 mm LFCSP to meet demanding performance and board space

requirements.

Regulators in the ADP5037 are activated though dedicated

enable pins. The default output voltages can be externally set in

the adjustable version or factory programmable to a wide range

of preset values in the fixed voltage version.

The high switching frequency of the buck regulators enables tiny

multilayer external components and minimizes the board space.

When the MODE pin is set high, the buck regulators operate in

forced PWM mode. When the MODE pin is set low and the

TYPICAL APPLICATION CIRCUIT

AVIN

HOUSEKEEPING

0.1µF

AVIN

VOUT1

L1 1µH

VIN1

SW1

FB1

2.3V TO

5.5V

OUT1

800mA

4.7µF

BUCK1

10µF

PGND1

EN1

OFF

MODE

PWM

MODE

PSM/PWM

VOUT2

VIN2

EN2

MODE

L2 1µH

SW2

FB2

OUT2

800mA

4.7µF

BUCK2

10µF

EN2

EN3

PGND2

EN3

VOUT3

FB3

OUT3

300mA

LDO1

(ANALOG)

VIN3

1.7V TO

5.5V

1µF

EN4

VOUT4

FB4

EN4

OUT4

300mA

OFF

LDO2

(DIGITAL)

VIN4

1µF

ADP5037

AGND

Figure 1.

Rev. D

Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Technical Support

www.analog.com

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