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ADP5033ACBZ-1-R7 PDF预览

ADP5033ACBZ-1-R7

更新时间: 2023-12-18 00:00:00
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亚德诺 - ADI 稳压器
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28页 660K
描述
Dual 3 MHz, 800 mA Buck Regulators with Two 300 mA LDOs

ADP5033ACBZ-1-R7 数据手册

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Dual 3 MHz, 800 mA Buck  
Regulators with Two 300 mA LDOs  
ADP5033  
The high switching frequency of the buck regulators enables  
tiny multilayer external components and minimizes the board  
space. When the MODE pin is set high, the buck regulators  
operate in forced PWM mode. When the MODE pin is set low,  
the buck regulators operate in QPXFS TBWF NPEF P4M . When  
UI F MPBE JT around the nominal value and the load current falls  
CFMPX B predefined threshold, the regulator operates in 14.  
improving the light load efficiency.  
FEATURES  
Main input voltage range: 2.3 V to 5.5 V  
Two 800 mA buck regulators and two 300 mA LDOs  
Tiny, 16-ball, 2 mm × 2 mm WLCSP package  
Regulator accuracy: 3ꢀ  
Factory programmable VOUTx  
3 MHz buck operation with forced PWM and auto PWM/PSM  
modes  
BUCK1/BUCK2: output voltage range from 0.8 V to 3.3 V  
LDO1/LDO2: output voltage range from 0.8 V to 3.3V  
LDO1/LDO2: low input supply voltage from 1.7 V to 5.5 V  
LDO1/LDO2: high PSRR and low output noise  
The two bucks operate out of phase to reduce the input capacitor  
requirement and noise.  
The low quiescent current, low dropout voltage, and wide input  
voltage range of the ADP5033 LDO extend the battery life of  
portable devices. The ADP5033 LDOs maintain power supply  
rejection greater than 60 dB for frequencies as high as 10 kHz  
while operating with a low headroom voltage.  
APPLICATIONS  
Power for processors, ASICS, FPGAs, and RF chipsets  
Portable instrumentation and medical devices  
Space constrained devices  
The regulators in the ADP5033 are activated by the ENA and  
ENB pins. The specific channels controlled by ENA and ENB  
are set by factory programming. A high voltage level applied to  
the enable pins activates the regulators. The default output  
voltages are factory programmable and can be set to a wide  
range of options.  
GENERAL DESCRIPTION  
The ADP5033 combines two high performance buck regulators  
and two low dropout regulators (LDO) in a tiny, 16-ball, 2 mm ×  
2 mm WLCSP to meet demanding performance and board  
space requirements.  
TYPICAL APPLICATION CIRCUIT  
ADP5033  
L1 1µH  
SW1  
VOUT1 @  
800mA  
VIN1  
2.3V TO 5.5V  
VOUT1  
C1  
4.7µF  
C5  
10µF  
BUCK1  
EN1  
PGND1  
MODE  
ENA  
ENB  
MODE  
ON  
OFF  
EN2  
EN3  
EN4  
PWM  
PSM/PWM  
VIN2  
MODE  
L2 1µH  
C2  
4.7µF  
SW2  
VOUT2 @  
800mA  
VOUT2  
BUCK2  
C6  
10µF  
PGND2  
EN2  
EN3  
VOUT3  
VIN3  
VIN4  
VOUT3 @  
300mA  
1.7V TO 5.5V  
LDO1  
C7  
C3  
1µF  
(ANALOG)  
1µF  
EN4  
VOUT4  
VOUT4 @  
300mA  
LDO2  
C8  
1µF  
C4  
1µF  
(DIGITAL)  
AGND  
Figure 1.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2011 Analog Devices, Inc. All rights reserved.  
 
 

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