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ADP3193AJCPZ-RL

更新时间: 2024-11-01 04:02:35
品牌 Logo 应用领域
亚德诺 - ADI 开关控制器
页数 文件大小 规格书
32页 1025K
描述
8-Bit, Programmable, 2- to 3-Phase, Synchronous Buck Controller

ADP3193AJCPZ-RL 数据手册

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8-Bit, Programmable, 2- to 3-Phase,  
Synchronous Buck Controller  
ADP3193A  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
VCC  
23  
RT RAMPADJ  
10  
Selectable 2- or 3-phase operation at up to 1 MHz per phase  
7.7 mV worst-case differential sensing error over  
temperature  
9
SHUNT  
REGULATOR  
OSCILLATOR  
15  
22  
21  
20  
OD  
UVLO  
Logic-level PWM outputs for interface to external high  
power drivers  
Fast enhanced PWM (FEPWM) flex mode for excellent load  
transient performance  
Active current balancing between all output phases  
Built-in power-good/crowbar blanking supports on-the-fly  
VID code changes  
Digitally programmable 0.5 V to 1.6 V output supports both  
VR10.x and VR11 specifications  
SHUTDOWN  
SET EN  
RESET  
+
14  
1
GND  
EN  
PWM1  
PWM2  
PWM3  
CMP  
+
850mV  
+
CMP  
RESET  
DAC  
+150mV  
+
2-/3-PHASE  
DRIVER LOGIC  
CSREF  
+
+
RESET  
CMP  
DAC  
–350mV  
CURRENT  
LIMIT  
DELAY  
2
CROWBAR  
PWRGD  
Programmable short-circuit protection with programmable  
latch-off delay  
19  
18  
SW1  
SW2  
17 SW3  
13  
APPLICATIONS  
CSCOMP  
8
7
ILIMIT  
CURRENT  
11  
12  
+
CSREF  
CSSUM  
MEASUREMENT  
AND LIMIT  
Desktop PC power supplies for  
Next generation Intel® processors  
VRM modules  
DELAY  
16  
5
IREF  
+
4
6
FB  
SS  
COMP  
GENERAL DESCRIPTION  
PRECISION  
REFERENCE  
The ADP3193A1 is a highly efficient, multiphase, synchronous  
buck switching regulator controller optimized for converting a  
12 V main supply into the core supply voltage required by high  
performance Intel processors. It uses an internal 8-bit DAC to read  
a voltage identification (VID) code directly from the processor,  
which is used to set the output voltage between 0.5 V and 1.6 V.  
+
BOOT  
VOLTAGE  
AND  
SOFT START  
CONTROL  
3
FBRTN  
VIDSEL  
VC DAC  
32  
ADP3193A  
24  
25  
26  
27  
28  
29  
30  
31  
VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0  
Figure 1.  
This device uses a multimode PWM architecture to drive the  
logic-level outputs at a programmable switching frequency that  
can be optimized for VR size and efficiency. The phase relation-  
ship of the output signals can be programmed to provide 2- or  
3-phase operation, allowing for the construction of up to three  
complementary buck switching stages.  
The ADP3193A has a built-in shunt regulator that allows the  
part to be connected to the 12 V system supply through a series  
resistor.  
The ADP3193A is specified over the extended commercial  
temperature range of 0°C to 85°C and is available in a  
32-lead LFCSP.  
The ADP3193A also includes programmable no load offset and  
slope functions to adjust the output voltage as a function of the  
load current, optimally positioning it for a system transient. The  
ADP3193A also provides accurate and reliable short-circuit  
protection, adjustable current limiting, and delayed power-good  
output that accommodates on-the-fly output voltage changes  
requested by the CPU.  
1 Protected by U.S. Patent Number 6,683,441; other patents pending.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2007 Analog Devices, Inc. All rights reserved.  
 

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