2-Phase IMVP-II and IMVP-III
Core Controller for Mobile CPUs
a
ADP3203
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Pin Selectable 1- or 2-Phase Operation
Static and Dynamic Current Sharing Characteristics
Backward Compatible to IMVP-II
VCC
Superior Load Transient Response with ADOPTTM
Optimal Positioning Technology
ADP3203
HYSSET
DSHIFT
BSHIFT
VR
HYSTERESIS
SETTING
AND
Noise Blanking for Speed and Stability
Synchronous Rectifier Control Extends Battery Life
Smooth Output Transition During VID Code Change
Cycle-by-Cycle Current Limiting
SHIFT-MUX
Hiccup or Latched Overload Protection
Transient Glitch-Free Power Good
OUT2
OUT1
PHASE
SPLITTER
Soft Start Eliminates Power-On In-Rush Current Surge
2-Level Overvoltage and Reverse Voltage Protection
CS2
CLIM
CS1
CS+
APPLICATIONS
CURRENT
SENSE
MUX
IMVP-II and IMVP-III Core DC-to-DC Converters
Fixed Voltage Mobile CPU Core DC-to-DC Converters
Notebook/Laptop Power Supplies
CS–
EN
RAMP
CORE
REG
Programmable Output Power Supplies
VID4
VID3
VID2
5-BIT VID
DAC
GENERAL DESCRIPTION
DACOUT
AND
The ADP3203 is a 1- or 2-phase hysteretic peak current dc-to-dc
buck converter controller dedicated to power a mobile
processor’s core. The optimized low voltage design is powered
from the 3.3 V system supply and draws only 10 µA maximum
in shutdown. The nominal output voltage is set by a 5-bit VID
code. To accommodate the transition time required by the
newest processors for on-the-fly VID changes, the ADP3203
features high speed operation to allow a minimized inductor size
that results in the fastest change of current to the output. To
further allow for the minimum number of output capacitors to
be used, the ADP3203 features active voltage positioning with
ADOPT optimal compensation to ensure a superior load transient
response. The output signal interfaces with the ADP3415
MOSFET driver that is optimized for high speed and high effi-
ciency for driving both the top and bottom MOSFETs of the buck
converter. The ADP3203 is capable of controlling the synchronous
rectifier to extend battery lifetime in light load conditions.
FIXED
REF
VID1
VID0
VR
SD
PWRGD
DPRSLP
ENABLE _UVLO MAIN BIAS
SR CONTROL
DRVLSD
PWRGD BLANKER
COREGD MONITOR
COREFB
SS-HICCUP TIMER AND OCP
OVP AND RVP
SS
VID MUX AND
SHIFT
SELECTOR
DSLP
BOM
CLAMP
PM MODULE
GND
ADOPT is a trademark of Analog Devices.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
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Tel: 781/329-4700
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© Analog Devices, Inc., 2002