2-/3-/4-Phase Synchronous Buck
Controller for IMVP-5 CPUs
ADP3206
FEATURES
Selectable 2-, 3-, or 4-phase operation at up to
1 MHz per phase
FUNCTIONAL BLOCK DIAGRAM
VCC
RAMPADJ RT
35
16 15
UVLO
SHUTDOWN
AND BIAS
6-bit digitally programmable 0.8375 V to 1.6 V output
10 mV DAC accuracy over temperature
13
SD
OSCILLATOR
SET
RESET
EN
34
CMP
CMP
PWM1
GND 21
Logic-level PWM outputs for interface to
external high power drivers
Active current/thermal balancing between phases
Built-in power good/crowbar blanking supports
on-the-fly VID code changes
ADP3206
RESET
33 PWM2
32 PWM3
31 PWM4
CURRENT-
BALANCING
CIRCUIT
TTMASK 22
2-/3-/4-PHASE
DRIVER LOGIC
RESET
THERMAL
THROTTLING
CONTROL
23
24
TTSENSE
VRTT
CMP
CMP
RESET
Programmable deep sleep offset and deeper sleep
reference voltage
Programmable soft transient control to minimize
inrush currents during output voltage changes
CSREF
CROWBAR
CURRENT LIMIT
28 SW1
27
SW2
Programmable short circuit protection with
programmable latch-off delay
26 SW3
PWRGD 12
DELAY
25
SW4
14
DELAY
APPLICATIONS
Desk-note and notebook PC power supplies for IMVP-5
compliant Intel® processors
19
18
20
CURRENT-
LIMITING
CIRCUIT
CSSUM
CSREF
ILIMIT 17
CSCOMP
SOFT
START
3
GENERAL DESCRIPTION
FB
4
COMP
11
10
9
DPSLP
DPSET
DPRSLP
The ADP3206 is a highly efficient multiphase synchronous
buck-switching regulator controller optimized for converting
the notebook main supply into the core supply voltage required
by IMVP-5 Intel processors. It uses an internal 6-bit DAC to
read a voltage identification (VID) code directly from the
processor, which is used to set the output voltage between
0.8375 V and 1.6 V, and uses a multimode PWM architecture
to drive the logic-level outputs at a programmable switching
frequency that can be optimized for VR size and efficiency. The
phase relationship of the output signals can be programmed to
provide 2-, 3-, or 4-phase operation.
DEEP/
DEEPER
SLEEP
8
DPRSET
PGMASK
CONTROL
5
29 OD2
30
OD1
6
STSET
PRECISION
REFERENCE
VID
DAC
2
7
40
39
38
37
36
1
VID0
FBRTN REF
VID1 VID2 VID3 VID4 VID5
Figure 1.
The ADP3206 includes programmable no-load offset and slope
functions to adjust the output voltage as a function of the load
current so that it is always optimally positioned for a system
transient. The ADP3206 also provides accurate and reliable
short circuit protection, adjustable current limiting, deep sleep
and deeper sleep programming inputs, and a delayed power
good output that accommodates on-the-fly output voltage
changes requested by the CPU.
ADP3206 is specified over the commercial temperature range of
0°C to 100°C and is available in a 40-lead LFCSP package.
Rev. 0
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However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
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