5-Bit, Programmable, Single-Phase,
Synchronous Buck Controller
ADP3209
FEATURES
GENERAL DESCRIPTION
Single-chip solution
Fully compatible with the Intel® GMCH chipset voltage
regulator specifications
Integrated MOSFET drivers
8 mꢀ worst-case differentially sensed core voltage error
over temperature
Automatic power-saving modes maximize efficiency during
light load operation
Soft transient control reduces inrush current and audio noise
Independent current limit and load line setting inputs for
additional design flexibility
The ADP3209 is a highly efficient, single-phase, synchronous
buck switching regulator controller. With its integrated drivers,
the ADP3209 is optimized for converting the notebook battery
voltage to render the supply voltage required by high performance
Intel chipsets. An internal 5-bit DAC is used to read a VID code
directly from the chipset and to set the GMCH core voltage to a
value within the range of 0.4 V to 1.25 V.
The ADP3209 uses a multimode architecture. It provides program-
mable switching frequency that can be optimized for efficiency
depending on the output current requirement. In addition, the
ADP3209 includes a programmable load line slope function to
adjust the output voltage as a function of the load current so that
the core voltage is always optimally positioned for a load transient.
The ADP3209 also provides accurate and reliable current overload
protection and a delayed power-good output. The IC supports
on-the-fly output voltage changes requested by the chipset.
Built-in power-good masking supports
voltage identification (ꢀID) on-the-fly transients
5-bit, digitally programmable DAC with 0.4 ꢀ to 1.25 ꢀ output
Short-circuit protection with programmable latch-off delay
Output power or current monitor options
32-lead LFCSP
APPLICATIONS
Notebook power supplies for next-generation Intel chipsets
The ADP3209 is specified over the extended commercial tempera-
ture range of 0°C to 100°C and is available in a 32-lead LFCSP.
FUNCTIONAL BLOCK DIAGRAM
RAMP VRPM RPM
RT
BST
OSCILLATOR
DRV
IN
ODB
ODA
DRVH
SW
PVCC
DRVL
PWM
RAMP
PWM
LATCH
GENER-
CMPS
PHASE
CONTROL
ATOR
PGND
+
–
–
+
SWITCH
AMPS
VREF
COMP
VID4
VID3
VID2
VID1
VID0
ERR AMP
VDAC
–
VID
DAC
FB
REFERENCE
SELECT
+
SS
+
–
LLINE
–
FBRTN
CSAMP
CSFB
ST
+
CSREF
CSCOMP
CLIM
CMP
VARFREQ
SS
CLREF
CLTHSEL
HOUSE-
KEEPING
–
+
+
+
–
–
PWRGD
CLIM
REFTH
REF
BIAS
BIAS
EN
VCC
GND
UVLO
CSAVG
–
VREF
PMON
PWM
+
ADP3209
FBRTN
PMON PMONFS
Figure 1.
©2008 SCILLC. All rights reserved.
January 2008 – Rev. 2
Publication Order Number:
ADP3209/D