3-Phase IMVP-II and IMVP-III
Core Controller for Mobile CPUs
a
ADP3204*
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Pin Selectable 1-, 2-, or 3-Phase Operation
Static and Dynamic Current Sharing Characteristics
Backward Compatible to IMVP-II
VCC
ADP3204
HYSSET
Superior Load Transient Response with ADOPT®
Analog Devices’ Optimal Positioning Technology
Noise-Blanking for Speed and Stability
Synchronous Rectifier Control Extends Battery Life
Smooth Output Transition During VID Code Change
Cycle-by-Cycle Current Limiting
DSHIFT
VR
BSHIFT
HYSTERESIS
SETTING
AND
DPRSHIFT
BOM
DPSLP
DPRSLP
OUT3
OUT2
OUT1
SHIFT-MUX
PHASE
SPLITTER
Hiccup or Latched Overload Protection
Transient-Glitch-Free Power Good
Soft Start Eliminates Power-On In-Rush Current Surge
Two-Level Overvoltage and Reverse Voltage
Protection
CS3
CS2
CS1
CS+
CS–
RAMP
REG
CLIM
CURRENT
SENSE
MUX
EN
CORE
APPLICATIONS
IMVP-II and IMVP-III Core DC-to-DC Converters
Fixed Voltage Mobile CPU Core DC-to-DC Converters
Notebook/Laptop Power Supplies
VID4
VID3
VID2
VID1
VID0
5-BIT VID
DAC
AND
FIXED
REF
VID
MUX
AND
REG
Programmable Output Power Supplies
DACOUT
DPRSLP
VID
GEN
DACRAMP
VR
GENERAL DESCRIPTION
The ADP3204 is a 1-, 2-, or 3-phase hysteretic peak current
dc-to-dc buck converter controller dedicated to power a mobile
processor’s core. The optimized low voltage design is powered
from the 3.3 V system supply. The nominal output voltage is
set by a 5-bit VID code. To accommodate the transition time
required by the newest processors, the ADP3204 features
high speed operation to allow a minimized inductor size that
results in the fastest change of current to the output. To
further allow for the minimum number of output capacitors
to be used, the ADP3204 features active voltage positioning
with ADOPT optimal compensation to ensure a superior
load transient response. The output signals interface with a
maximum of three ADP3415 MOSFET drivers that are
optimized for high speed and high efficiency for driving both the
top and bottom MOSFETs of the buck converter. The
ADP3204 is capable of controlling the synchronous rectifiers to
extend battery lifetime in light load conditions.
COREGD MONITOR
VID TRANSIENT
DETECTOR AND
SHIFT SELECTOR
BOM
COREFB
SS
SS-HICCUP TIMER
AND OCP
DPSLP
DPRSLP
PWRGD
SD
SR CONTROL
PWRGD BLANKER
DRVLSD
ENABLE UVLO-MAIN BIAS
PM MODULE
OVP AND RVP
CLAMP
GND
ADOPT is a trademark of Analog Devices, Inc.
*Protected by U.S.Patent No. 5,969,657; other patents pending.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
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Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© Analog Devices, Inc., 2002