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ADP320

更新时间： 2024-09-27 11:54:27
品牌 Logo 应用领域
亚德诺 - ADI 调节器
页数 文件大小 规格书
20页 704K
描述
Triple, 200 mA, Low Noise, High PSRR Voltage Regulator

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ADP320 数据手册

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Triple, 200 mA, Low Noise,  
High PSRR Voltage Regulator  
ADP320  
TYPICAL APPLICATION CIRCUITS  
FEATURES  
Bias voltage range (VBIAS): 2.5 V to 5.5 V  
LDO input voltage range (VIN1/VIN2, VIN3): 1.8 V to 5.5 V  
Three 200 mA low dropout voltage regulators  
16-lead, 3 mm × 3 mm LFCSP  
VBIAS  
ADP320  
VBIAS  
2.5V TO  
5.5V  
+
+
1µF  
1µF  
VIN1/VIN2  
1.8V TO  
5.5V  
Initial accuracy: 1ꢀ  
VOUT1  
LDO 1  
ON  
ON  
Stable with 1 μF ceramic output capacitors  
No noise bypass capacitor required  
3 independent logic controlled enables  
Over current and thermal protection  
Key specifications  
High PSRR  
76 dB PSRR up to 1 kHz  
70 dB PSRR 10 kHz  
60 dB PSRR at 100 kHz  
+
EN1  
EN LD1  
VBIAS  
OFF  
OFF  
1µF  
VOUT2  
LDO 2  
EN2  
+
EN LD2  
VBIAS  
1µF  
VIN3  
1.8V TO  
5.5V  
+
VOUT3  
LDO 3  
1µF  
EN3  
ON  
+
OFF  
EN LD3  
1µF  
40 dB PSRR at 1 MHz  
GND  
Low output noise  
Figure 1. Typical Application Circuit  
29 μV rms typical output noise at VOUT = 1.2 V  
55 μV rms typical output noise at VOUT = 2.8 V  
Excellent transient response  
Low dropout voltage: 110 mV @ 200 mA load  
85 μA typical ground current at no load, all LDOs enabled  
100 μs fast turn-on circuit  
Guaranteed 200 mA output current per regulator  
−40°C to +125°C junction temperature  
APPLICATIONS  
Mobile phones  
Digital cameras and audio devices  
Portable and battery-powered equipment  
Portable medical devices  
Post dc-to-dc regulation  
GENERAL DESCRIPTION  
The ADP320 200 mA triple output LDO combines high PSRR, low  
noise, low quiescent current, and low dropout voltage in a voltage  
regulator ideally suited for wireless applications with demanding  
performance and board space requirements.  
LDO offers much lower noise performance than competing LDOs  
without the need for a noise bypass capacitor.  
The ADP320 triple LDO is available in a miniature 16-lead  
3 mm × 3 mm LFCSP package and is stable with tiny 1 μF 30ꢀ  
ceramic output capacitors, resulting in the smallest possible board  
area for a wide variety of portable power needs.  
The low quiescent current, low dropout voltage, and wide input  
voltage range of the ADP320 triple LDO extend the battery life of  
portable devices. The ADP320 triple LDO maintains power supply  
rejection greater than 60 dB for frequencies as high as 100 kHz  
while operating with a low headroom voltage. The ADP320 triple  
The ADP320 triple LDO is available in output voltage combin-  
ations ranging from 0.8 V to 3.3 V and offers over current and  
thermal protection to prevent damage in adverse conditions.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2010 Analog Devices, Inc. All rights reserved.  
 
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