Datasheet > ADG1412L

ADG1412L

更新时间： 2023-12-20 18:44:55

品牌	Logo	应用领域
亚德诺 - ADI		开关
页数	文件大小	规格书
19页	893K
描述
1.5Ω RON，配备1.2V和1.8VJEDEC逻辑的四SPST开关

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ADG1412L 数据手册

Data Sheet

ADG1412L

1.5 Ω R_ON, Quad SPST Switch with 1.2 V and 1.8 V JEDEC Logic Compliance

FEATURES

FUNCTIONAL BLOCK DIAGRAM

► 1.5 Ω on resistance for ±15 V dual supply at 25°C

► 0.3 Ω on-resistance flatness for ±15 V dual supply at 25°C

► 0.1 Ω on-resistance match between channels for ±15 V dual

supply at 25°C

► Fully specified at ±15 V, +12 V, ±5 V

► ±4.5 V to ±16.5 V dual-supply operation

► 5 V to 16.5 V single-supply operation

► V_Lsupply for low logic-level compatibility

► 1.8 V JEDEC standard compliant (JESD8-7A)

► 1.2 V JEDEC standard compliant (JESD8-12A.01)

► Rail-to-rail operation

► 24-lead, 4 mm × 4 mm LFCSP

APPLICATIONS

Figure 1. Functional Block Diagram

► Automated test equipment

► Data-acquisition systems

► Battery-powered systems

► Sample-and-hold systems

► FPGA and microcontroller systems

► Audio signal routing

► Video signal routing

► Communications systems

► Relay replacement

PRODUCT HIGHLIGHTS

1. 2.6 Ω maximum on resistance over temperature.

2. Minimum distortion.

3. V_Lsupply for low logic-level compatibility.

4. JEDEC standard compliant for both 1.2 V and 1.8 V logic levels.

5. Guaranteed switch off when digital inputs are floating.

6. 24-lead, 4 mm × 4 mm LFCSP.

GENERAL DESCRIPTION

The ADG1412L is a monolithic complementary metal-oxide semi-

conductor (CMOS) device containing four independently selectable

switches designed on an iCMOS^®process. Industrial CMOS (iC-

MOS) is a modular manufacturing process combining high voltage

CMOS and bipolar technologies.

The on-resistance profile is flat over the full analog input range,

ensuring excellent linearity and low distortion (1.5 Ω typical) when

switching signals.

The ADG1412L contains four independent SPST switches, and

these switches are turned on with Logic 1. Each switch conducts

equally well in both directions when on and has an input signal

range that extends to the supplies. In the off condition, signal levels

up to the supplies are blocked.

An external V_Lsupply provides flexibility for lower logic control. The

ADG1412L is both 1.2 V and 1.8 V JEDEC standard compliant.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable "as is". However, no responsibility is assumed by Analog

Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to

change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

DOCUMENT FEEDBACK

TECHNICAL SUPPORT

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与ADG1412L相关器件

型号	品牌	获取价格	描述	数据表
ADG1412YCPZ-500RL7	ADI	获取价格	2з Max On Resistance, 【15 V/12 V/【5 V iCMOS⑩
ADG1412YCPZ-REEL	ADI	获取价格	1.5 Ω On Resistance, ±15 V/+12 V/±5
ADG1412YCPZ-REEL7	ADI	获取价格	2з Max On Resistance, 【15 V/12 V/【5 V iCMOS⑩
ADG1412YRUZ	ADI	获取价格	2з Max On Resistance, 【15 V/12 V/【5 V iCMOS⑩
ADG1412YRUZ-REEL	ADI	获取价格	2з Max On Resistance, 【15 V/12 V/【5 V iCMOS⑩
ADG1412YRUZ-REEL7	ADI	获取价格	2з Max On Resistance, 【15 V/12 V/【5 V iCMOS⑩
ADG1413	ADI	获取价格	2з Max On Resistance, 【15 V/12 V/【5 V iCMOS⑩
ADG1413_15	ADI	获取价格	CMOS, Quad SPST Switches
ADG1413YCPZ-500RL7	ADI	获取价格	2з Max On Resistance, 【15 V/12 V/【5 V iCMOS⑩
ADG1413YCPZ-REEL7	ADI	获取价格	2з Max On Resistance, 【15 V/12 V/【5 V iCMOS⑩

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