Datasheet > ADCLK914/PCBZ1

ADCLK914/PCBZ1

更新时间： 2022-04-21 21:09:11

品牌	Logo	应用领域
亚德诺 - ADI		时钟
页数	文件大小	规格书
12页	304K
描述
Ultrafast, SiGe, Open-Collector HVDS Clock/Data Buffer

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数据手册

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ADCLK914/PCBZ1 数据手册

ADCLK914

TYPICAL PERFORMANCE CHARACTERISTICS

V_CC= 3.3 V, V_EE= 0 V, T_A= 25°C. All outputs terminated through 50 ꢀ to V_CC, unless otherwise noted.

62.5ps/DIV

100ps/DIV

Figure 3. Output Waveform at 1 GHz, V_CC= 3.3 V

Figure 6. Output Waveform at 1 GHz, V_CC= 3.3 V

–120

–130

–140

–150

–160

–130

–140

–150

–160

–170

100

10k

100k

10M

100M

100

10k

100k

10M

100M

FREQUENCY (Hz)

Figure 4. Phase Noise at 122.88 MHz

Figure 7. Phase Noise at 622.08 MHz

–120

350

= 25°C

300

250

–130

–140

–150

–160

200

150

100

–170

100

10k

100k

10M

100M

FREQUENCY (Hz)

INPUT SLEW RATE (V/ns)

Figure 5. Phase Noise at 245.76 MHz

Figure 8. RMS Jitter vs. Input Slew Rate

Rev. A | Page ꢀ of 12

1...4 5 678 9 10...12

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