Datasheet > ADCLK907BCPZ-WP

ADCLK907BCPZ-WP

更新时间： 2022-02-26 10:09:53

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
16页	867K
描述
Ultrafast SiGe ECL Clock/Data Buffers

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ADCLK907BCPZ-WP 数据手册

ADCLK905/ADCLK907/ADCLK925

Data Sheet

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

ADCLK905

TOP VIEW

(Not to Scale)

NOTES

1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.

2. EXPOSED PAD. THE EXPOSED PAD IS NOT ELECTRICALLY CONNECTED TO ANY PART OF THE CIRCUIT.

IT CAN BE LEFT FLOATING FOR OPTIMAL ELECTRICAL ISOLATION BETWEEN THE PACKAGE HANDLE

AND THE SUBSTRATE OF THE DIE. IT CAN ALSO BE SOLDERED TO THE APPLICATION BOARD IF IMPROVED

THERMAL AND/OR MECHANICAL STABILITY IS DESIRED. EXPOSED METAL AT THE CORNERS OF THE PACKAGE

IS CONNECTED TO THIS EXPOSED PAD. ALLOW SUFFICIENT CLEARANCE TO VIAS AND OTHER COMPONENTS.

Figure 4. ADCLK905 Pin Configuration

Table 4. Pin Function Descriptions for 1:1 ADCLK905 Buffer

Pin No.

Mnemonic

Description

Noninverting Input.

Inverting Input.

3, 4, 5, 6,

9, 10

No Connect. No physical connection to the die.

7, 14

8, 13

V_EE

V_CC

Negative Supply Voltage.

Positive Supply Voltage.

Inverting Output.

Noninverting Output.

V_REF

V_T

Reference Voltage. Reference voltage for biasing ac-coupled inputs.

Center Tap. Center tap of 100 Ω input resistor.

EPAD

Exposed Pad. The exposed pad is not electrically connected to any part of the circuit. It can be left floating for

optimal electrical isolation between the package handle and the substrate of the die. It can also be soldered to

the application board if improved thermal and/or mechanical stability is desired. Exposed metal at the corners

of the package is connected to this exposed pad. Allow sufficient clearance to vias and other components.

Rev. B | Page 6 of 16

1...3 4 567 8 9...16

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