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ADC10062CIWMX PDF预览

ADC10062CIWMX

更新时间： 2024-01-09 05:24:23
品牌 Logo 应用领域
德州仪器 - TI 光电二极管转换器
页数 文件大小 规格书
22页 1170K
描述
2-CH 10-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO24, SOP-24

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ADC10062CIWMX 技术参数

生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP,针数：24
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.82
最大模拟输入电压：5.05 V最小模拟输入电压：-0.05 V
最长转换时间：0.9 µs转换器类型：ADC, FLASH METHOD
JESD-30 代码：R-PDSO-G24长度：15.4 mm
最大线性误差 (EL)：0.1465%模拟输入通道数量：2
位数：10功能数量：1
端子数量：24最高工作温度：85 °C
最低工作温度：-40 °C输出位码：BINARY
输出格式：PARALLEL, WORD封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE采样速率：0.8 MHz
采样并保持/跟踪并保持：SAMPLE座面最大高度：2.65 mm
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL宽度：7.5 mm
Base Number Matches：1

ADC10062CIWMX 数据手册

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ADC10061, ADC10062, ADC10064  
www.ti.com  
SNAS069E –JUNE 1999–REVISED MARCH 2013  
ADC10061/ADC10062/ADC10064 10-Bit 600 ns A/D Converter with Input Multiplexer and  
Sample/Hold  
Check for Samples: ADC10061, ADC10062, ADC10064  
1
FEATURES  
DESCRIPTION  
NOTE: The ADC10061 and ADC10062 are obsolete.  
They are described here for reference only.  
2
•
Built-in Sample-and-Hold  
Single +5V Supply  
•
•
•
Using an innovative, patented multistep* conversion  
technique, these CMOS analog-to-digital converters  
offer sub-microsecond conversion times yet dissipate  
a maximum of only 235 mW. These converters  
perform 10-bit conversions in two lower-resolution  
“flashes”, yielding a fast A/D without the cost, power  
consumption, and other problems associated with  
true flash approaches.  
No External Clock Required  
Speed Adjust Pin for Faster Conversions  
(ADC10062 and ADC10064). See ADC10662/4  
for High Speed Ensured Performance.  
APPLICATIONS  
•
•
•
•
Digital Signal Processor Front Ends  
Instrumentation  
The analog input voltage is sampled and held by an  
internal sampling circuit. Input signals at frequencies  
from DC to over 200 kHz can, therefore, be digitized  
accurately without the need for an external sample-  
and-hold circuit.  
Disk Drives  
Mobile Telecommunications  
KEY SPECIFICATIONS  
The ADC10062 and ADC10064 include a “speed-up”  
pin. Connecting an external resistor between this pin  
and ground reduces the typical conversion time to as  
little as 350 ns with only a small increase in linearity  
error.  
•
•
•
•
•
Conversion Time 600 ns Typical, 900 ns Max  
Sampling Rate 800 kHz  
Low Power Dissipation 235 mW (Max)  
Total Unadjusted Error ±1.0 LSB (Max)  
No Missing Codes Over Temperature  
For ease of interface to microprocessors, the  
ADC10061, ADC10062, and ADC10064 have been  
designed to appear as a memory location or I/O port  
without the need for external interface logic.  
*U.S. Patent Number 4918449  
Simplified Block Diagram  
*ADC10061 Only, **ADC10062 and ADC10064 Only, ***ADC10064 Only  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 1999–2013, Texas Instruments Incorporated  
1234567...22

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