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ADC1006S055 PDF预览

ADC1006S055

更新时间: 2023-12-18 00:00:00
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
31页 385K
描述
Single 10 bits ADC, up to 55 MHz or 70 MHz

ADC1006S055 数据手册

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ADC1006S055/070  
Single 10 bits ADC, up to 55 MHz or 70 MHz  
Rev. 02 — 12 August 2008  
Product data sheet  
1. General description  
The ADC1006S055/070 are a family of Bipolar CMOS (BiCMOS) 10-bit Analog-to-Digital  
Converters (ADC) optimized for a wide range of applications such as cellular  
infrastructures, professional telecommunications, imaging, and digital radio. It converts  
the analog input signal into 10-bit binary coded digital words at a maximum sampling rate  
of 70 MHz. All static digital inputs (SH, CE and OTC) are Transistor-Transistor Logic (TTL)  
and CMOS compatible and all outputs are CMOS compatible. A sine wave clock input  
signal can also be used.  
2. Features  
I 10-bit resolution  
I Sampling rate up to 70 MHz  
I 3 dB bandwidth of 245 MHz  
I 5 V power supplies and 3.3 V output power supply  
I Binary or two’s complement CMOS outputs  
I In-range CMOS compatible output  
I TTL and CMOS compatible static digital inputs  
I TTL and CMOS compatible digital outputs  
I Differential AC or Positive Emitter-Coupled Logic (PECL) clock input; TTL compatible  
I Power dissipation 550 mW (typical)  
I Low analog input capacitance (typical 2 pF), no buffer amplifier required  
I Integrated sample-and-hold amplifier  
I Differential analog input  
I External amplitude range control  
I Voltage controlled regulator included  
I 40 °C to +85 °C ambient temperature  
3. Applications  
High-speed analog-to-digital conversion for:  
I Cellular infrastructure  
I Professional telecommunication  
I Digital radio  
I Radar  
I Medical imaging  
I Fixed network  
I Cable modem  

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