ADC10065QCIMT

更新时间： 2024-02-16 14:33:29

品牌	Logo	应用领域
美国国家半导体 - NSC		转换器
页数	文件大小	规格书
19页	942K
描述
IC,A/D CONVERTER,SINGLE,10-BIT,CMOS,TSSOP,28PIN

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中文翻译

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技术参数
数据手册

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ADC10065QCIMT 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
包装说明：	TSSOP, TSSOP28,.25	Reach Compliance Code：	unknown
风险等级：	5.92	最大模拟输入电压：	2 V
转换器类型：	A/D CONVERTER	JESD-30 代码：	R-PDSO-G28
最大线性误差 (EL)：	0.11%	位数：	10
功能数量：	1	端子数量：	28
最高工作温度：	85 °C	最低工作温度：	-40 °C
输出位码：	OFFSET BINARY, 2'S COMPLEMENT BINARY	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装等效代码：	TSSOP28,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源：	2.5,3 V	认证状态：	Not Qualified
子类别：	Analog to Digital Converters	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.635 mm
端子位置：	DUAL	Base Number Matches：	1

ADC10065QCIMT 数据手册

May 2005

ADC10065

10-Bit 65 MSPS 3V A/D Converter

General Description

Features

n Single +3.0V operation

The ADC10065 is a monolithic CMOS analog-to-digital con-

verter capable of converting analog input signals into 10-bit

digital words at 65 Megasamples per second (MSPS). This

converter uses a differential, pipeline architecture with digital

error correction and an on-chip sample-and-hold circuit to

provide a complete conversion solution, and to minimize

power consumption, while providing excellent dynamic per-

formance. A unique sample-and-hold stage yields a full-

power bandwidth of 400 MHz. Operating on a single 3.0V

power supply, this device consumes just 68.4 mW at

65 MSPS, including the reference current. The Standby

feature reduces power consumption to just 14 .1 mW.

n Selectable 2.0 V_P-P, 1.5 V_P-P, or 1.0 V_P-Pfull-scale input

swing

n 400 MHz −3 dB input bandwidth

n Low power consumption

n Standby mode

n On-chip reference and sample-and-hold amplifier

n Offset binary or two’s complement data format

n Separate adjustable output driver supply to

accommodate 2.5V and 3.3V logic families

n 28-pin TSSOP package

The differential inputs provide a full scale selectable input

swing of 2.0 V_P-P, 1.5 V_P-P, 1.0 V_P-P, with the possibility of a

single-ended input. Full use of the differential input is recom-

mended for optimum performance. An internal +1.2V preci-

sion bandgap reference is used to set the ADC full-scale

range, and also allows the user to supply a buffered refer-

enced voltage for those applications requiring increased ac-

curacy. The output data format is 10-bit offset binary, or two’s

complement.

Key Specifications

n Resolution

10 Bits

65 MSPS

400 MHz

n Conversion Rate

n Full Power Bandwidth

n DNL

n SNR (f_IN= 11 MHz)

n SFDR (f_IN= 11 MHz)

n Data Latency

0.3 LSB (typ)

59.6 dB (typ)

−80 dB (typ)

6 Clock Cycles

+3.0V

This device is available in the 28-lead TSSOP package and

will operate over the industrial temperature range of −40˚C to

+85˚C.

n Supply Voltage

n Power Consumption, 65 MHz

68.4 mW

Applications

n Ultrasound and Imaging

n Instrumentation

n Cellular Based Stations/Communications Receivers

n Sonar/Radar

n xDSL

n Wireless Local Loops

n Data Acquisition Systems

n DSP Front Ends

Connection Diagram

20077901

DS200779

www.national.com

12 3 4 5 6 7...19

中文翻译

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与ADC10065QCIMT相关器件

型号	品牌	获取价格	描述	数据表
ADC10065QCIMTX	NSC	获取价格	IC,A/D CONVERTER,SINGLE,10-BIT,CMOS,TSSOP,28PIN
ADC1006S055	NXP	获取价格	Single 10 bits ADC, up to 55 MHz or 70 MHz
ADC1006S055	IDT	获取价格	Single 10 bits ADC, up to 55 MHz or 70 MHz
ADC1006S055H	IDT	获取价格	Single 10 bits ADC, up to 55 MHz or 70 MHz
ADC1006S055H	NXP	获取价格	Single 10 bits ADC, up to 55 MHz or 70 MHz
ADC1006S055H-C18	IDT	获取价格	PQFP-44, Reel
ADC1006S070	NXP	获取价格	Single 10 bits ADC, up to 55 MHz or 70 MHz
ADC1006S070	IDT	获取价格	Single 10 bits ADC, up to 55 MHz or 70 MHz
ADC1006S070H	IDT	获取价格	Single 10 bits ADC, up to 55 MHz or 70 MHz
ADC1006S070H	NXP	获取价格	Single 10 bits ADC, up to 55 MHz or 70 MHz

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