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ADC10061CMJ-QML

更新时间： 2024-12-01 13:05:27

品牌	Logo	应用领域
美国国家半导体 - NSC		转换器复用器
页数	文件大小	规格书
14页	336K
描述
IC,DATA ACQ SYSTEM,1-CHANNEL,10-BIT,DIP,24PIN,CERAMIC

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技术参数
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ADC10061CMJ-QML 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
包装说明：	DIP, DIP24,.4	Reach Compliance Code：	unknown
风险等级：	5.92	最大模拟输入电压：	5 V
转换器类型：	D/A CONVERTER	JESD-30 代码：	R-XDIP-T24
JESD-609代码：	e0	最大线性误差 (EL)：	0.15%
模拟输入通道数量：	1	位数：	10
端子数量：	24	最高工作温度：	125 °C
最低工作温度：	-55 °C	输出位码：	BINARY
封装主体材料：	CERAMIC	封装代码：	DIP
封装等效代码：	DIP24,.4	封装形状：	RECTANGULAR
封装形式：	IN-LINE	电源：	5 V
认证状态：	Not Qualified	筛选级别：	38535Q/M;38534H;883B
子类别：	Analog to Digital Converters	标称供电电压：	5 V
表面贴装：	NO	技术：	CMOS
温度等级：	MILITARY	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	Base Number Matches：	1

ADC10061CMJ-QML 数据手册

June 1999

ADC10061/ADC10062/ADC10064

10-Bit 600 ns A/D Converter with Input Multiplexer and

Sample/Hold

General Description

Features

n Built-in sample-and-hold

Using an innovative, patented multistep conversion tech-

nique, the 10-bit ADC10061, ADC10062, and ADC10064

CMOS analog-to-digital converters offer sub-microsecond

conversion times yet dissipate a maximum of only 235 mW.

n Single +5V supply

n 1, 2, or 4-input multiplexer options

n No external clock required

n Speed adjust pin for faster conversions (ADC10062

and ADC10064). See ADC10662/4 for high speed

guaranteed performance.

The ADC10061, ADC10062, and ADC10064 perform

10-bit conversion in two lower-resolution “flashes”, thus

yielding a fast A/D without the cost, power dissipation, and

other problems associated with true flash approaches. The

ADC10061 is pin-compatible with the ADC1061 but much

faster, thus providing a convenient upgrade path for the

ADC1061.

Key Specifications

n Conversion time to 10 bits

600 ns typical,

900 ns max over temperature

800 kHz

The analog input voltage to the ADC10061, ADC10062, and

ADC10064 is sampled and held by an internal sampling cir-

cuit. Input signals at frequencies from dc to over 200 kHz

can therefore be digitized accurately without the need for an

external sample-and-hold circuit.

n Sampling Rate

n Low power dissipation

n Total unadjusted error

n No missing codes over temperature

235 mW (max)

1.0 LSB (max)

The ADC10062 and ADC10064 include a “speed-up” pin.

Connecting an external resistor between this pin and ground

reduces the typical conversion time to as little as 350 ns with

only a small increase in linearity error.

Applications

n Digital signal processor front ends

n Instrumentation

For ease of interface to microprocessors, the ADC10061,

ADC10062, and ADC10064 have been designed to appear

as a memory location or I/O port without the need for exter-

nal interface logic.

n Disk drives

n Mobile telecommunications

U.S. Patent Number 4918449

Simplified Block Diagram

DS011020-1

ADC10061 Only

ADC10062 and ADC10064 Only

***

ADC10064 Only

TRI-STATE^®is a registered trademark of National Semiconductor Corporation.

DS011020

www.national.com

12 3 4 5 6 7...14

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与ADC10061CMJ-QML相关器件

型号	品牌	获取价格	描述	数据表
ADC10062	TI	获取价格	A/D Converter
ADC10062	NSC	获取价格	10-Bit 600 ns A/D Converter with Input Multiplexer and Sample/Hold
ADC10062BIJ	ETC	获取价格	Single-Ended Data Acquisition System
ADC10062BIWMX	TI	获取价格	2-CH 10-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO24, 0.300 INCH, PLASTIC, SOP-24
ADC10062CIWM	NSC	获取价格	10-Bit 600 ns A/D Converter with Input Multiplexer and Sample/Hold
ADC10062CIWMX	TI	获取价格	2-CH 10-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO24, SOP-24
ADC10062CMJ	TI	获取价格	10-BIT FLASH METHOD ADC, PARALLEL ACCESS, CDIP24, CERDIP-24
ADC10062CMJ/883	ETC	获取价格	Single-Ended Data Acquisition System
ADC10062CMJ-QML	TI	获取价格	IC,DATA ACQ SYSTEM,1-CHANNEL,10-BIT,DIP,24PIN,CERAMIC
ADC10064	NSC	获取价格	10-Bit 600 ns A/D Converter with Input Multiplexer and Sample/Hold

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