5秒后页面跳转
ADC08D1000_05 PDF预览

ADC08D1000_05

更新时间: 2024-11-30 04:48:47
品牌 Logo 应用领域
美国国家半导体 - NSC 转换器
页数 文件大小 规格书
37页 1109K
描述
High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D Converter

ADC08D1000_05 数据手册

 浏览型号ADC08D1000_05的Datasheet PDF文件第2页浏览型号ADC08D1000_05的Datasheet PDF文件第3页浏览型号ADC08D1000_05的Datasheet PDF文件第4页浏览型号ADC08D1000_05的Datasheet PDF文件第5页浏览型号ADC08D1000_05的Datasheet PDF文件第6页浏览型号ADC08D1000_05的Datasheet PDF文件第7页 
December 2005  
ADC08D1000  
High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D  
Converter  
General Description  
Features  
n Internal Sample-and-Hold  
The ADC08D1000 is a dual, low power, high performance  
CMOS analog-to-digital converter that digitizes signals to 8  
bits resolution at sampling rates up to 1.3 GSPS. Consuming  
a typical 1.6 Watts at 1 GSPS from a single 1.9 Volt supply,  
this device is guaranteed to have no missing codes over the  
full operating temperature range. The unique folding and  
interpolating architecture, the fully differential comparator  
design, the innovative design of the internal sample-and-  
hold amplifier and the self-calibration scheme enable a very  
flat response of all dynamic parameters beyond Nyquist,  
producing a high 7.4 ENOB with a 500 MHz input signal and  
a 1 GHz sample rate while providing a 10-18 B.E.R. Output  
formatting is offset binary and the LVDS digital outputs are  
compliant with IEEE 1596.3-1996, with the exception of an  
adjustable common mode voltage between 0.8V and 1.2V.  
n Single +1.9V 0.1V Operation  
n Choice of SDR or DDR output clocking  
n Interleave Mode for 2x Sampling Rate  
n Multiple ADC Synchronization Capability  
n Guaranteed No Missing Codes  
n Serial Interface for Extended Control  
n Fine Adjustment of Input Full-Scale Range and Offset  
n Duty Cycle Corrected Sample Clock  
Key Specifications  
n Resolution  
8 Bits  
1 GSPS (min)  
10-18 (typ)  
7.4 Bits (typ)  
0.15 LSB (typ)  
n Max Conversion Rate  
n Bit Error Rate  
Each converter has a 1:2 demultiplexer that feeds two LVDS  
buses and reduces the output data rate on each bus to half  
the sampling rate. The two converters can be interleaved  
and used as a single 2 GSPS ADC.  
@
n ENOB 500 MHz Input  
n DNL  
n Power Consumption  
— Operating  
1.6 W (typ)  
3.5 mW (typ)  
The converter typically consumes less than 3.5 mW in the  
Power Down Mode and is available in a 128-lead, thermally  
enhanced exposed pad LQFP and operates over the Indus-  
trial (-40˚C TA +85˚C) temperature range.  
— Power Down Mode  
Applications  
n Direct RF Down Conversion  
n Digital Oscilloscopes  
n Satellite Set-top boxes  
n Communications Systems  
n Test Instrumentation  
Block Diagram  
20097453  
© 2005 National Semiconductor Corporation  
DS200974  
www.national.com  

与ADC08D1000_05相关器件

型号 品牌 获取价格 描述 数据表
ADC08D1000_08 NSC

获取价格

High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D Converter
ADC08D1000_09 NSC

获取价格

High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D Converter
ADC08D1000CIYB NSC

获取价格

High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D Converter
ADC08D1000CIYB ROCHESTER

获取价格

DUAL 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP128, MS-026BFB, LQFP-128
ADC08D1000CIYB/NOPB TI

获取价格

8 位、双路 1.0GSPS 或单路 2.0GSPS 模数转换器 (ADC) | NNB
ADC08D1000DEV NSC

获取价格

High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D Converter
ADC08D1000EVAL NSC

获取价格

High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D Converter
ADC08D1000QML NSC

获取价格

High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D Converter
ADC08D1000WGFQV NSC

获取价格

High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D Converter
ADC08D1000WG-Q TI

获取价格

IC PROPRIETARY METHOD ADC, CQFP128, CERAMIC, QFP-128, Analog to Digital Converter