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ADC08D1000_08 PDF预览

ADC08D1000_08

更新时间: 2024-01-16 01:17:50
品牌 Logo 应用领域
美国国家半导体 - NSC 转换器
页数 文件大小 规格书
40页 1265K
描述
High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D Converter

ADC08D1000_08 数据手册

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March 20, 2008  
ADC08D1000  
High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D  
Converter  
General Description  
Features  
The ADC08D1000 is a dual, low power, high performance  
CMOS analog-to-digital converter that digitizes signals to 8  
bits resolution at sampling rates up to 1.3 GSPS. Consuming  
a typical 1.6 Watts at 1 GSPS from a single 1.9 Volt supply,  
this device is guaranteed to have no missing codes over the  
full operating temperature range. The unique folding and in-  
terpolating architecture, the fully differential comparator de-  
sign, the innovative design of the internal sample-and-hold  
amplifier and the self-calibration scheme enable a very flat  
response of all dynamic parameters beyond Nyquist, produc-  
ing a high 7.4 ENOB with a 500 MHz input signal and a 1 GHz  
sample rate while providing a 10-18 B.E.R. Output formatting  
is offset binary and the LVDS digital outputs are compatible  
with IEEE 1596.3-1996, with the exception of an adjustable  
common mode voltage between 0.8V and 1.2V.  
Internal Sample-and-Hold  
Single +1.9V ±0.1V Operation  
Choice of SDR or DDR output clocking  
Interleave Mode for 2x Sampling Rate  
Multiple ADC Synchronization Capability  
Guaranteed No Missing Codes  
Serial Interface for Extended Control  
Fine Adjustment of Input Full-Scale Range and Offset  
Duty Cycle Corrected Sample Clock  
Key Specifications  
Resolution  
Max Conversion Rate  
Bit Error Rate  
ENOB @ 500 MHz Input  
DNL  
Power Consumption  
8 Bits  
1 GSPS (min)  
10-18 (typ)  
7.4 Bits (typ)  
±0.15 LSB (typ)  
Each converter has a 1:2 demultiplexer that feeds two LVDS  
buses and reduces the output data rate on each bus to half  
the sampling rate. The two converters can be interleaved and  
used as a single 2 GSPS ADC.  
The converter typically consumes less than 3.5 mW in the  
Power Down Mode and is available in a 128-lead, thermally  
enhanced exposed pad LQFP and operates over the Indus-  
trial (-40°C TA +85°C) temperature range.  
Operating  
Power Down Mode  
1.6 W (typ)  
3.5 mW (typ)  
Applications  
Direct RF Down Conversion  
Digital Oscilloscopes  
Satellite Set-top boxes  
Communications Systems  
Test Instrumentation  
Block Diagram  
20097453  
© 2008 National Semiconductor Corporation  
200974  
www.national.com  

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