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ADC08D1000CIYB/NOPB PDF预览

ADC08D1000CIYB/NOPB

更新时间: 2023-09-03 20:36:38
品牌 Logo 应用领域
德州仪器 - TI 转换器模数转换器
页数 文件大小 规格书
52页 1391K
描述
8 位、双路 1.0GSPS 或单路 2.0GSPS 模数转换器 (ADC) | NNB | 128 | -40 to 85

ADC08D1000CIYB/NOPB 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:QFP
包装说明:LQFP-128针数:128
Reach Compliance Code:compliantECCN代码:3A001.A.5.A.1
HTS代码:8542.39.00.01风险等级:1.79
Is Samacsys:N最大模拟输入电压:0.95 V
最小模拟输入电压:0.79 V转换器类型:ADC, PROPRIETARY METHOD
JESD-30 代码:S-PQFP-G128JESD-609代码:e3
长度:20 mm最大线性误差 (EL):0.3516%
湿度敏感等级:3模拟输入通道数量:1
位数:8功能数量:2
端子数量:128最高工作温度:85 °C
最低工作温度:-40 °C输出位码:OFFSET BINARY
输出格式:PARALLEL, 8 BITS封装主体材料:PLASTIC/EPOXY
封装代码:HLFQFP封装形状:SQUARE
封装形式:FLATPACK, HEAT SINK/SLUG, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):260
认证状态:Not Qualified采样速率:1300 MHz
采样并保持/跟踪并保持:SAMPLE座面最大高度:1.6 mm
标称供电电压:1.9 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:20 mm
Base Number Matches:1

ADC08D1000CIYB/NOPB 数据手册

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ADC08D1000  
SNAS248I SEPTEMBER 2004REVISED FEBRUARY 2015  
ADC08D1000 High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D Converter  
1 Features  
4 Description  
The ADC08D1000 is  
a dual, low power, high  
1
Internal Sample-and-Hold  
performance CMOS analog-to-digital converter that  
digitizes signals to 8 bits resolution at sampling rates  
up to 1.3 GSPS. Consuming a typical 1.6 Watts at 1  
GSPS from a single 1.9 Volt supply, this device is  
ensured to have no missing codes over the full  
operating temperature range. The unique folding and  
interpolating architecture, the fully differential  
comparator design, the innovative design of the  
internal sample-and-hold amplifier and the self-  
calibration scheme enable a very flat response of all  
dynamic parameters beyond Nyquist, producing a  
high 7.4 ENOB with a 500 MHz input signal and a 1  
GHz sample rate while providing a 10-18 B.E.R.  
Output formatting is offset binary and the LVDS  
digital outputs are compatible with IEEE 1596.3-1996,  
with the exception of an adjustable common mode  
voltage between 0.8V and 1.2V.  
Single +1.9V ±0.1V Operation  
Choice of SDR or DDR Output Clocking  
Interleave Mode for 2x Sampling Rate  
Multiple ADC Synchronization Capability  
Ensured No Missing Codes  
Serial Interface for Extended Control  
Fine Adjustment of Input Full-Scale Range and  
Offset  
Duty Cycle Corrected Sample Clock  
2 Applications  
Direct RF Down Conversion  
Digital Oscilloscopes  
Satellite Set-top boxes  
Communications Systems  
Test Instrumentation  
Each converter has a 1:2 demultiplexer that feeds  
two LVDS buses and reduces the output data rate on  
each bus to half the sampling rate. The two  
converters can be interleaved and used as a single 2  
GSPS ADC.  
3 Key Specifications  
The converter typically consumes less than 3.5 mW  
in the Power Down Mode and is available in a 128-  
lead, thermally enhanced exposed pad HLQFP and  
operates over the Industrial (-40°C TA +85°C)  
temperature range.  
Resolution: 8 Bits  
Max Conversion Rate: 1 GSPS (min)  
Bit Error Rate: 10-18 (typ)  
ENOB @ 500 MHz Input: 7.4 Bits (typ)  
DNL: ±0.15 LSB (typ)  
Patenting Notice:  
Power Consumption  
The Texas Instruments products covered by this  
datasheet are protected by at least the following U.S.  
patents: Pat. No. 6,847,320; Pat. No. 7,015,729; Pat.  
No. 7,068,195; and Pat. No. 7,088,281. This list of  
patents may not be all inclusive, and the products  
covered by this datasheet may be protected by  
additional issued patents and patents pending both in  
the U.S. and elsewhere in the world. A copy of this  
datasheet including the patent list noted here is also  
Operating: 1.6 W (typ)  
Power Down Mode: 3.5 mW (typ)  
available  
on  
the  
Internet  
www.ti.com/lit/gpn/adc08d1000. This is intended to  
serve as notice under 35 U.S.C. § 287(a).  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 
 

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