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ADC08B3000RB

更新时间： 2024-02-18 04:28:03
品牌 Logo 应用领域
美国国家半导体 - NSC 转换器
页数 文件大小 规格书
44页 1312K
描述
8-bIT, 3gsps, High Performance, Low Power A/D Converter with 4K Buffer

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中文翻译

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ADC08B3000RB 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：QFP
包装说明：GREEN, HLQFP-128针数：128
Reach Compliance Code：compliantECCN代码：3A001.A.5.A.1
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：1.55Is Samacsys：N
最大模拟输入电压：0.88 V最小模拟输入电压：-0.81 V
最长转换时间：0.00033 µs转换器类型：ADC, FLASH METHOD
JESD-30 代码：S-PQFP-G128JESD-609代码：e3
长度：20 mm最大线性误差 (EL)：0.3516%
湿度敏感等级：3模拟输入通道数量：1
位数：8功能数量：1
端子数量：128最高工作温度：85 °C
最低工作温度：-40 °C输出位码：OFFSET BINARY
输出格式：PARALLEL, 8 BITS封装主体材料：PLASTIC/EPOXY
封装代码：HLFQFP封装等效代码：QFP128,.87SQ,20
封装形状：SQUARE封装形式：FLATPACK, HEAT SINK/SLUG, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：260电源：1.9 V
认证状态：Not Qualified采样速率：3000 MHz
采样并保持/跟踪并保持：SAMPLE座面最大高度：1.6 mm
子类别：Analog to Digital Converters最大压摆率：800 mA
标称供电电压：1.9 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：20 mm
Base Number Matches：1

ADC08B3000RB 数据手册

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January 16, 2008  
ADC08B3000  
8-Bit, 3 GSPS, High Performance, Low Power A/D  
Converter with 4K Buffer  
General Description  
Features  
The ADC08B3000 is a single, low power, high performance  
CMOS analog-to-digital converter that digitizes signals to 8  
bits resolution at sample rates up to 3.4 Gigasamples Per  
Second, (Gsps). Consuming a typical 1.6 Watts at 3 Gsps  
from a single 1.9 Volt supply, this device is guaranteed to have  
no missing codes over the full operating temperature range.  
The unique folding and interpolating architecture, the fully dif-  
ferential comparator design, the innovative design of the in-  
ternal sample-and-hold amplifier and the calibration scheme  
enable an excellent response of all dynamic parameters up  
to Nyquist, producing a high 7.1 Effective Number Of Bits,  
(ENOB), with a 748 MHz input signal and a 3 GHz sample  
rate while providing a 10-18 Code Error Rate. A sample rate  
of 3 Gsps is achieved by interleaving two ADCs, each oper-  
ating at 1.5 Gsps. Output formatting is offset binary. The  
device contains a 4K Capture Buffer with output on two 8-bit  
Low Voltage CMOS (LVCMOS) output buses at rates up to  
200MHz.  
Single +1.9V ±0.1V Operation  
■
■
■
■
Choice of SDR or DDR output clocking  
Internal selectable 4K Data Buffer  
Serial Interface for Extended Control  
Adjustment of Input Full-Scale Range, Offset and Clock  
Phase  
■
Duty Cycle Corrected Sample Clock  
Test Pattern Output Capability  
■
■
Key Specifications  
Resolution  
Max Conversion Rate  
Code Error Rate  
ENOB @ 748 MHz Input  
SNR @ 748 MHz  
Full Power Bandwidth  
8 Bits  
3 Gsps (min)  
10-18 (typ)  
7.1 Bits (typ)  
44.9 dB (typ)  
3 GHz (typ)  
■
■
■
■
■
■
The converter typically consumes less than 25 mW in the  
Power Down Mode and is available in a 128-lead, thermally  
enhanced exposed pad LQFP and operates over the Indus-  
trial (-40°C ≤ TA ≤ +85°C) temperature range.  
Power Consumption  
■
Full Power Capture  
Power Down Mode  
1.6 W (typ)  
25 mW (typ)  
—
—
Applications  
Distance Ranging  
■
■
Test and Measurement  
Ordering Information  
Industrial Temperature Range  
(-40°C < TA < +85°C)  
NS Package  
ADC08B3000CIYB  
ADC08B3000RB  
128-Pin Exposed Pad LQFP  
Development System  
© 2008 National Semiconductor Corporation  
201601  
www.national.com  
1234567...44

中文翻译

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