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AD9204BCPZRL7-80 PDF预览

AD9204BCPZRL7-80

更新时间: 2024-10-28 00:50:07
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亚德诺 - ADI /
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37页 1291K
描述
1.8 V Dual Analog-to-Digital Converter

AD9204BCPZRL7-80 数据手册

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10-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS,  
1.8 V Dual Analog-to-Digital Converter  
Data Sheet  
AD9204  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
AVDD  
GND  
SDIO SCLK CSB  
1.8 V analog supply operation  
1.8 V to 3.3 V output supply  
SNR  
SPI  
ORA  
D9A  
61.3 dBFS at 9.7 MHz input  
61.0 dBFS at 200 MHz input  
SFDR  
PROGRAMMING DATA  
VIN+A  
VIN–A  
ADC  
D0A  
75 dBc at 9.7 MHz input  
73 dBc at 200 MHz input  
DCOA  
VREF  
Low power  
SENSE  
DRVDD  
AD9204  
30 mW per channel at 20 MSPS  
63 mW per channel at 80 MSPS  
Differential input with 700 MHz bandwidth  
On-chip voltage reference and sample-and-hold circuit  
DNL = 0.11 LSB  
REF  
SELECT  
VCM  
ORB  
D9B  
RBIAS  
VIN–B  
VIN+B  
ADC  
D0B  
Serial port control options  
DCOB  
Scalable analog input: 1 V p-p to 2 V p-p differential  
Offset binary, gray code, or twos complement data format  
Optional clock duty cycle stabilizer  
Integer 1-to-8 input clock divider  
Built-in selectable digital test pattern generation  
Energy-saving power-down modes  
Data clock out with programmable clock and data  
alignment  
DIVIDE  
1 TO 8  
DUTY CYCLE  
STABILIZER  
MODE  
CONTROLS  
CLK+ CLK–  
SYNC  
DCS  
PDWN DFS OEB  
Figure 1.  
PRODUCT HIGHLIGHTS  
1. The AD9204 operates from a single 1.8 V analog power  
supply and features a separate digital output driver supply  
to accommodate 1.8 V to 3.3 V logic families.  
APPLICATIONS  
Communications  
2. The patented sample-and-hold circuit maintains excellent  
performance for input frequencies up to 200 MHz and is  
designed for low cost, low power, and ease of use.  
3. A standard serial port interface supports various product  
features and functions, such as data output formatting,  
internal clock divider, power-down, DCO/DATA timing  
and offset adjustments, and voltage reference modes.  
4. The AD9204 is packaged in a 64-lead RoHS compliant  
LFCSP that is pin compatible with the AD9268 16-bit  
ADC, the AD9251 and AD9258 14-bit ADCs, and the  
AD9231 12-bit ADC, enabling a simple migration path  
between 10-bit and 16-bit converters sampling from  
20 MSPS to 125 MSPS.  
Diversity radio systems  
Multimode digital receivers  
GSM, EDGE, W-CDMA, LT E, CDMA2000, WiMAX, TD-SCDMA  
I/Q demodulation systems  
Smart antenna systems  
Battery-powered instruments  
Handheld scope meters  
Ultrasound  
Radar/LIDAR  
PET/SPECT imaging  
Rev. A  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©2009–2016 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 

AD9204BCPZRL7-80 替代型号

型号 品牌 替代类型 描述 数据表
AD9204BCPZ-80 ADI

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