Datasheet > AD9212ABCPZ-65

AD9212ABCPZ-65

更新时间： 2024-10-27 12:27:19

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
56页	1700K
描述
Octal, 10-Bit, 40 MSPS/65 MSPS, Serial LVDS, 1.8 V ADC

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AD9212ABCPZ-65 数据手册

Octal, 10-Bit, 40 MSPS/65 MSPS,

Serial LVDS, 1.8 V ADC

Data Sheet

AD9212

FEATURES

FUNCTIONAL BLOCK DIAGRAM

AVDD

PDWN

DRVDD

DRGND

8 analog-to-digital converters (ADCs) integrated into 1 package

100 mW ADC power per channel at 65 MSPS

SNR = 60.8 dB (to Nyquist)

ENOB = 9.8 bits

SFDR = 80 dBc (to Nyquist)

AD9212

VIN + A

VIN – A

D + A

D – A

SERIAL

LVDS

ADC

VIN + B

VIN – B

D + B

D – B

SERIAL

LVDS

Excellent linearity

DNL = 0.3 LSB (typical); INL = 0.4 LSB (typical)

Serial LVDS (ANSI-644, default)

Low power, reduced signal option (similar to IEEE 1596.3)

Data and frame clock outputs

325 MHz, full-power analog bandwidth

2 V p-p input voltage range

VIN + C

VIN – C

D + C

D – C

SERIAL

LVDS

ADC

VIN + D

VIN – D

D + D

D – D

SERIAL

LVDS

ADC

VIN + E

VIN – E

SERIAL

LVDS

D + E

D – E

1.8 V supply operation

Serial port control

VIN + F

VIN – F

D + F

D – F

SERIAL

LVDS

Full-chip and individual-channel power-down modes

Flexible bit orientation

Built-in and custom digital test pattern generation

Programmable clock and data alignment

Programmable output resolution

Standby mode

VIN + G

VIN – G

D + G

D – G

SERIAL

LVDS

ADC

VIN + H

VIN – H

D + H

D – H

SERIAL

LVDS

VREF

FCO+

FCO–

SENSE

APPLICATIONS

0.5V

DATA RATE

MULTIPLIER

Medical imaging and nondestructive ultrasound

Portable ultrasound and digital beam-forming systems

Quadrature radio receivers

Diversity radio receivers

Tape drives

Optical networking

REFT

REFB

REF

SELECT

SERIAL PORT

INTERFACE

DCO+

DCO–

SCLK/

DTP

RBIAS AGND CSB SDIO/

ODM

CLK+

CLK–

Figure 1.

The ADC contains several features designed to maximize

Test equipment

flexibility and minimize system cost, such as programmable

clock and data alignment and programmable digital test pattern

generation. The available digital test patterns include built-in

deterministic and pseudorandom patterns, along with custom user-

defined test patterns entered via the serial port interface (SPI).

GENERAL DESCRIPTION

The AD9212 is an octal, 10-bit, 40 MSPS/65 MSPS ADC with an

on-chip sample-and-hold circuit designed for low cost, low power,

small size, and ease of use. Operating at a conversion rate of up to

65 MSPS, it is optimized for outstanding dynamic performance

and low power in applications where a small package size is critical.

The AD9212 is available in a RoHS-compliant, 64-lead LFCSP. It is

specified over the industrial temperature range of −40°C to +85°C.

The ADC requires a single 1.8 V power supply and LVPECL-/

CMOS-/LVDS-compatible sample rate clock for full performance

operation. No external reference or driver components are

required for many applications.

PRODUCT HIGHLIGHTS

1. Small Footprint. Eight ADCs are contained in a small package.

2. Low Power of 100 mW per Channel at 65 MSPS.

3. Ease of Use. A data clock output (DCO) operates up to

300 MHz and supports double data rate (DDR) operation.

4. User Flexibility. SPI control offers a wide range of flexible

features to meet specific system requirements.

The ADC automatically multiplies the sample rate clock for

the appropriate LVDS serial data rate. A data clock (DCO)

for capturing data on the output and a frame clock (FCO) for

signaling a new output byte are provided. Individual channel

power-down is supported and typically consumes less than

2 mW when all channels are disabled.

5. Pin-Compatible Family. This includes the AD9222 (12-bit)

and AD9252 (14-bit).

Rev. E

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

www.analog.com

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AD9212ABCPZ-65 替代型号

型号	品牌	替代类型	描述	数据表
AD9212ABCPZRL7-40	ADI	完全替代	Octal, 10-Bit, 40 MSPS/65 MSPS, Serial LVDS, 1.8 V ADC
AD9222ABCPZ-65	ADI	类似代替	Octal, 12-Bit, 40/50/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9222ABCPZ-40	ADI	类似代替	Octal, 12-Bit, 40/50/65 MSPS Serial LVDS 1.8 V A/D Converter

与AD9212ABCPZ-65相关器件

型号	品牌	获取价格	描述	数据表
AD9212ABCPZRL7-40	ADI	获取价格	Octal, 10-Bit, 40 MSPS/65 MSPS, Serial LVDS, 1.8 V ADC
AD9212ABCPZRL7-65	ADI	获取价格	Octal, 10-Bit, 40 MSPS/65 MSPS, Serial LVDS, 1.8 V ADC
AD9212BCPZ-40	ADI	获取价格	Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9212BCPZ-65	ADI	获取价格	Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9212BCPZRL7-40	ADI	获取价格	Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9212BCPZRL7-65	ADI	获取价格	Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9213	ADI	获取价格	12 位 10.25 GSPS JESD204B RF 模数转换器
AD9213S	ADI	获取价格	12位、10.25 GSPS、JESD204B RF模数转换器
AD9214	ADI	获取价格	10-Bit, 65/80/105 MSPS 3 V A/D Converter
AD9214-105PCB	ADI	获取价格	10-Bit, 65/80/105 MSPS 3 V A/D Converter

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